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authorMian Yousaf Kaukab <yousaf.kaukab@suse.com>2019-08-08 12:22:02 +0200
committerMian Yousaf Kaukab <yousaf.kaukab@suse.com>2019-08-08 12:22:26 +0200
commitdecabafeabaad86038d2b53b9a1eb39095d9d22f (patch)
tree3def4116528844f45744aabe31185d4a39d92ba3
parent1dcdbb570df98c2c88d57ef8d25a8fd7477cb565 (diff)
PM / devfreq: rockchip-dfi: Move GRF definitions to a common
place (bsc#1144718,bsc#1144813).
-rw-r--r--patches.drivers/0011-PM-devfreq-rockchip-dfi-Move-GRF-definitions-to-a-co.patch110
-rw-r--r--series.conf1
2 files changed, 111 insertions, 0 deletions
diff --git a/patches.drivers/0011-PM-devfreq-rockchip-dfi-Move-GRF-definitions-to-a-co.patch b/patches.drivers/0011-PM-devfreq-rockchip-dfi-Move-GRF-definitions-to-a-co.patch
new file mode 100644
index 0000000000..c572d93e6e
--- /dev/null
+++ b/patches.drivers/0011-PM-devfreq-rockchip-dfi-Move-GRF-definitions-to-a-co.patch
@@ -0,0 +1,110 @@
+From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
+Date: Thu, 21 Mar 2019 19:14:36 -0400
+Subject: PM / devfreq: rockchip-dfi: Move GRF definitions to a common place.
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Git-commit: adfe3b76608ffe547af5a74415f15499b798f32a
+Patch-mainline: v5.2-rc1
+References: bsc#1144718,bsc#1144813
+
+Some rk3399 GRF (Generic Register Files) definitions can be used for
+different drivers. Move these definitions to a common include so we
+don't need to duplicate these definitions.
+
+Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
+Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
+Signed-off-by: Gaƫl PORTAY <gael.portay@collabora.com>
+Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
+Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
+---
+ drivers/devfreq/event/rockchip-dfi.c | 23 +++++++----------------
+ include/soc/rockchip/rk3399_grf.h | 21 +++++++++++++++++++++
+ 2 files changed, 28 insertions(+), 16 deletions(-)
+ create mode 100644 include/soc/rockchip/rk3399_grf.h
+
+diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
+index fcbf76ebf55d..a436ec4901bb 100644
+--- a/drivers/devfreq/event/rockchip-dfi.c
++++ b/drivers/devfreq/event/rockchip-dfi.c
+@@ -26,6 +26,8 @@
+ #include <linux/list.h>
+ #include <linux/of.h>
+
++#include <soc/rockchip/rk3399_grf.h>
++
+ #define RK3399_DMC_NUM_CH 2
+
+ /* DDRMON_CTRL */
+@@ -43,18 +45,6 @@
+ #define DDRMON_CH1_COUNT_NUM 0x3c
+ #define DDRMON_CH1_DFI_ACCESS_NUM 0x40
+
+-/* pmu grf */
+-#define PMUGRF_OS_REG2 0x308
+-#define DDRTYPE_SHIFT 13
+-#define DDRTYPE_MASK 7
+-
+-enum {
+- DDR3 = 3,
+- LPDDR3 = 6,
+- LPDDR4 = 7,
+- UNUSED = 0xFF
+-};
+-
+ struct dmc_usage {
+ u32 access;
+ u32 total;
+@@ -83,16 +73,17 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
+ u32 ddr_type;
+
+ /* get ddr type */
+- regmap_read(info->regmap_pmu, PMUGRF_OS_REG2, &val);
+- ddr_type = (val >> DDRTYPE_SHIFT) & DDRTYPE_MASK;
++ regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
++ ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
++ RK3399_PMUGRF_DDRTYPE_MASK;
+
+ /* clear DDRMON_CTRL setting */
+ writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
+
+ /* set ddr type to dfi */
+- if (ddr_type == LPDDR3)
++ if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
+ writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
+- else if (ddr_type == LPDDR4)
++ else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
+ writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
+
+ /* enable count, use software mode */
+diff --git a/include/soc/rockchip/rk3399_grf.h b/include/soc/rockchip/rk3399_grf.h
+new file mode 100644
+index 000000000000..3eebabcb2812
+--- /dev/null
++++ b/include/soc/rockchip/rk3399_grf.h
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * Rockchip General Register Files definitions
++ *
++ * Copyright (c) 2018, Collabora Ltd.
++ * Author: Enric Balletbo i Serra <enric.balletbo@collabora.com>
++ */
++
++#ifndef __SOC_RK3399_GRF_H
++#define __SOC_RK3399_GRF_H
++
++/* PMU GRF Registers */
++#define RK3399_PMUGRF_OS_REG2 0x308
++#define RK3399_PMUGRF_DDRTYPE_SHIFT 13
++#define RK3399_PMUGRF_DDRTYPE_MASK 7
++#define RK3399_PMUGRF_DDRTYPE_DDR3 3
++#define RK3399_PMUGRF_DDRTYPE_LPDDR2 5
++#define RK3399_PMUGRF_DDRTYPE_LPDDR3 6
++#define RK3399_PMUGRF_DDRTYPE_LPDDR4 7
++
++#endif
+--
+2.11.0
+
diff --git a/series.conf b/series.conf
index fd34f9a97c..4189525274 100644
--- a/series.conf
+++ b/series.conf
@@ -22334,6 +22334,7 @@
patches.drivers/cpufreq-ppc_cbe-fix-possible-object-reference-leak.patch
patches.drivers/PM-core-Propagate-dev-power.wakeup_path-when-no-call.patch
patches.drivers/0010-PM-devfreq-rk3399_dmc-remove-unneeded-semicolon.patch
+ patches.drivers/0011-PM-devfreq-rockchip-dfi-Move-GRF-definitions-to-a-co.patch
patches.fixes/ACPI-property-fix-handling-of-data_nodes-in-acpi_get.patch
patches.arch/x86-mce-fix-machine_check_poll-tests-for-error-types.patch
patches.arch/x86-mce-handle-varying-mca-bank-counts.patch