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authorTakashi Iwai <tiwai@suse.de>2019-07-10 15:18:47 +0200
committerTakashi Iwai <tiwai@suse.de>2019-07-10 15:18:51 +0200
commit6b491bfc0bad51df87dc4868edb8baa44d04a399 (patch)
tree5d55995c086a0488d782803be33591d1820a256c
parentaa557dcb39f4268aa85f4e66b3e78644f79dfafd (diff)
drm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZE
(bsc#1051510).
-rw-r--r--patches.drm/drm-amdgpu-gfx9-use-reset-default-for-PA_SC_FIFO_SIZ.patch52
-rw-r--r--series.conf1
2 files changed, 53 insertions, 0 deletions
diff --git a/patches.drm/drm-amdgpu-gfx9-use-reset-default-for-PA_SC_FIFO_SIZ.patch b/patches.drm/drm-amdgpu-gfx9-use-reset-default-for-PA_SC_FIFO_SIZ.patch
new file mode 100644
index 0000000000..6c26dc9131
--- /dev/null
+++ b/patches.drm/drm-amdgpu-gfx9-use-reset-default-for-PA_SC_FIFO_SIZ.patch
@@ -0,0 +1,52 @@
+From 25f09f858835b0e9a06213811031190a17d8ab78 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 1 Jul 2019 08:38:12 -0500
+Subject: [PATCH] drm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZE
+Git-commit: 25f09f858835b0e9a06213811031190a17d8ab78
+Patch-mainline: v5.2
+References: bsc#1051510
+
+Recommended by the hw team.
+
+Reviewed-and-tested-by: Huang Rui <ray.huang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 19 -------------------
+ 1 file changed, 19 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+index b610e3b30d95..2f18c64d531f 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -1959,25 +1959,6 @@ static void gfx_v9_0_constants_init(struct amdgpu_device *adev)
+ mutex_unlock(&adev->srbm_mutex);
+
+ gfx_v9_0_init_compute_vmid(adev);
+-
+- mutex_lock(&adev->grbm_idx_mutex);
+- /*
+- * making sure that the following register writes will be broadcasted
+- * to all the shaders
+- */
+- gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
+-
+- WREG32_SOC15(GC, 0, mmPA_SC_FIFO_SIZE,
+- (adev->gfx.config.sc_prim_fifo_size_frontend <<
+- PA_SC_FIFO_SIZE__SC_FRONTEND_PRIM_FIFO_SIZE__SHIFT) |
+- (adev->gfx.config.sc_prim_fifo_size_backend <<
+- PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) |
+- (adev->gfx.config.sc_hiz_tile_fifo_size <<
+- PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) |
+- (adev->gfx.config.sc_earlyz_tile_fifo_size <<
+- PA_SC_FIFO_SIZE__SC_EARLYZ_TILE_FIFO_SIZE__SHIFT));
+- mutex_unlock(&adev->grbm_idx_mutex);
+-
+ }
+
+ static void gfx_v9_0_wait_for_rlc_serdes(struct amdgpu_device *adev)
+--
+2.16.4
+
diff --git a/series.conf b/series.conf
index 08b619befe..045c01beb3 100644
--- a/series.conf
+++ b/series.conf
@@ -22725,6 +22725,7 @@
patches.suse/mm-vmscan.c-prevent-useless-kswapd-loops.patch
patches.fixes/crypto-cryptd-Fix-skcipher-instance-memory-leak.patch
patches.fixes/crypto-user-prevent-operating-on-larval-algorithms.patch
+ patches.drm/drm-amdgpu-gfx9-use-reset-default-for-PA_SC_FIFO_SIZ.patch
patches.fixes/scsi-target-iblock-fix-overrun-in-write-same-emulation
patches.drivers/dmaengine-imx-sdma-remove-BD_INTR-for-channel0.patch
patches.drivers/pwm-stm32-Use-3-cells-of_xlate.patch