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authorTakashi Iwai <tiwai@suse.de>2019-02-14 12:09:56 +0100
committerTakashi Iwai <tiwai@suse.de>2019-02-14 12:10:01 +0100
commit87496365f21fe91a49ce39e26417c7edcba7d685 (patch)
treefe1476cdad9559dd7327457169bb659d670019b3
parent4914f9efd7fccf65f06d64696d590fd23712158a (diff)
pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
(bsc#1051510).
-rw-r--r--patches.drivers/pinctrl-sunxi-a83t-Fix-IRQ-offset-typo-for-PH11.patch41
-rw-r--r--series.conf1
2 files changed, 42 insertions, 0 deletions
diff --git a/patches.drivers/pinctrl-sunxi-a83t-Fix-IRQ-offset-typo-for-PH11.patch b/patches.drivers/pinctrl-sunxi-a83t-Fix-IRQ-offset-typo-for-PH11.patch
new file mode 100644
index 0000000000..279c7ecde0
--- /dev/null
+++ b/patches.drivers/pinctrl-sunxi-a83t-Fix-IRQ-offset-typo-for-PH11.patch
@@ -0,0 +1,41 @@
+From 478b6767ad26ab86d9ecc341027dd09a87b1f997 Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Tue, 4 Dec 2018 17:04:57 +0800
+Subject: [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
+Git-commit: 478b6767ad26ab86d9ecc341027dd09a87b1f997
+Patch-mainline: v4.20-rc7
+References: bsc#1051510
+
+Pin PH11 is used on various A83T board to detect a change in the OTG
+port's ID pin, as in when an OTG host cable is plugged in.
+
+The incorrect offset meant the gpiochip/irqchip was activating the wrong
+pin for interrupts.
+
+Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+index 6624499eae72..4ada80317a3b 100644
+--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
++++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+@@ -568,7 +568,7 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
+ SUNXI_FUNCTION(0x0, "gpio_in"),
+ SUNXI_FUNCTION(0x1, "gpio_out"),
+- SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PH_EINT11 */
++ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PH_EINT11 */
+ };
+
+ static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = {
+--
+2.16.4
+
diff --git a/series.conf b/series.conf
index 62286329aa..291f5983b5 100644
--- a/series.conf
+++ b/series.conf
@@ -19839,6 +19839,7 @@
patches.drm/0001-drm-amdgpu-update-SMC-firmware-image-for-polaris10-v.patch
patches.drm/0001-drm-nouveau-kms-Fix-memory-leak-in-nv50_mstm_del.patch
patches.drivers/pinctrl-meson-fix-pull-enable-register-calculation.patch
+ patches.drivers/pinctrl-sunxi-a83t-Fix-IRQ-offset-typo-for-PH11.patch
patches.arch/powerpc-boot-Fix-build-failures-with-j-1.patch
patches.fixes/0011-arm64-dma-mapping-Fix-FORCE_CONTIGUOUS-buffer-cleari.patch
patches.fixes/aio-fix-spectre-gadget-in-lookup_ioctx.patch