powerpc/powernv: Clear PECE1 in LPCR via stop-api only on

Hotplug (bsc#1119766, bsc#1055121). - Refresh patches.arch/powerpc-powernv-Provide-a-way-to-force-a-core-into-S.patch.
author: Michal Suchanek <msuchanek@suse.de> 2019-01-18 12:09:07 +0100
committer: Michal Suchanek <msuchanek@suse.de> 2019-01-18 12:16:48 +0100
commit: b18d46108a6bacf34ae2a77896bce0b402def876 (patch)
tree: 1b18f9957292d61d72f6be4340113c219650f58f
parent: dd6077c8eed7e05c2c9c81f1ad5c239067ab7ecb (diff)
3 files changed, 128 insertions, 20 deletions
diff --git a/patches.arch/powerpc-powernv-Clear-PECE1-in-LPCR-via-stop-api-onl.patch b/patches.arch/powerpc-powernv-Clear-PECE1-in-LPCR-via-stop-api-onl.patch
new file mode 100644
index 0000000000..3cef3c8219
--- /dev/null
+++ b/patches.arch/powerpc-powernv-Clear-PECE1-in-LPCR-via-stop-api-onl.patch
@@ -0,0 +1,122 @@
+From 24be85a23d1fcdc72264a062a2e4ebaaea48feab Mon Sep 17 00:00:00 2001
+From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
+Date: Fri, 21 Jul 2017 16:31:34 +0530
+Subject: [PATCH] powerpc/powernv: Clear PECE1 in LPCR via stop-api only on
+ Hotplug
+
+References: bsc#1119766, bsc#1055121
+Patch-mainline: v4.14-rc1
+Git-commit: 24be85a23d1fcdc72264a062a2e4ebaaea48feab
+
+Currently we use the stop-api provided by the firmware to program the
+SLW engine to restore the values of hypervisor resources that get lost
+on deeper idle states (such as winkle). Since the deep states were
+only used for CPU-Hotplug on POWER8 systems, we would program the LPCR
+to have the PECE1 bit since Hotplugged CPUs shouldn't be spuriously
+woken up by decrementer.
+
+On POWER9, some of the deep platform idle states such as stop4 can be
+used in cpuidle as well. In this case, we want the CPU in stop4 to be
+woken up by the decrementer when some timer on the CPU expires.
+
+In this patch, we program the stop-api for LPCR with PECE1
+bit cleared only when we are offlining the CPU and set it
+back once the CPU is online.
+
+Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
+Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Acked-by: Michal Suchanek <msuchanek@suse.de>
+---
+ arch/powerpc/platforms/powernv/idle.c | 34 ++++++++++++++++++++++++++-
+ arch/powerpc/platforms/powernv/smp.c  |  8 -------
+ 2 files changed, 33 insertions(+), 9 deletions(-)
+
+--- a/arch/powerpc/platforms/powernv/idle.c
++++ b/arch/powerpc/platforms/powernv/idle.c
+@@ -69,7 +69,7 @@ static int pnv_save_sprs_for_deep_states
+ 	 * all cpus at boot. Get these reg values of current cpu and use the
+ 	 * same across all cpus.
+ 	 */
+-	uint64_t lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
++	uint64_t lpcr_val = mfspr(SPRN_LPCR);
+ 	uint64_t hid0_val = mfspr(SPRN_HID0);
+ 	uint64_t hid1_val = mfspr(SPRN_HID1);
+ 	uint64_t hid4_val = mfspr(SPRN_HID4);
+@@ -388,6 +388,14 @@ void power9_idle(void)
+ }
+ 
+ #ifdef CONFIG_HOTPLUG_CPU
++static void pnv_program_cpu_hotplug_lpcr(unsigned int cpu, u64 lpcr_val)
++{
++	u64 pir = get_hard_smp_processor_id(cpu);
++
++	mtspr(SPRN_LPCR, lpcr_val);
++	opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val);
++}
++
+ /*
+  * pnv_cpu_offline: A function that puts the CPU into the deepest
+  * available platform idle state on a CPU-Offline.
+@@ -397,6 +405,20 @@ unsigned long pnv_cpu_offline(unsigned i
+ {
+ 	unsigned long srr1;
+ 	u32 idle_states = pnv_get_supported_cpuidle_states();
++	u64 lpcr_val;
++
++	/*
++	 * We don't want to take decrementer interrupts while we are
++	 * offline, so clear LPCR:PECE1. We keep PECE2 (and
++	 * LPCR_PECE_HVEE on P9) enabled as to let IPIs in.
++	 *
++	 * If the CPU gets woken up by a special wakeup, ensure that
++	 * the SLW engine sets LPCR with decrementer bit cleared, else
++	 * the CPU will come back to the kernel due to a spurious
++	 * wakeup.
++	 */
++	lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
++	pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
+ 
+ 	ppc64_runlatch_off();
+ 
+@@ -428,6 +450,16 @@ unsigned long pnv_cpu_offline(unsigned i
+ 
+ 	ppc64_runlatch_on();
+ 
++	/*
++	 * Re-enable decrementer interrupts in LPCR.
++	 *
++	 * Further, we want stop states to be woken up by decrementer
++	 * for non-hotplug cases. So program the LPCR via stop api as
++	 * well.
++	 */
++	lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1;
++	pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
++
+ 	return srr1;
+ }
+ #endif
+--- a/arch/powerpc/platforms/powernv/smp.c
++++ b/arch/powerpc/platforms/powernv/smp.c
+@@ -163,12 +163,6 @@ static void pnv_smp_cpu_kill_self(void)
+ 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
+ 		wmask = SRR1_WAKEMASK_P8;
+ 
+-	/* We don't want to take decrementer interrupts while we are offline,
+-	 * so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9)
+-	 * enabled as to let IPIs in.
+-	 */
+-	mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
+-
+ 	while (!generic_check_cpu_restart(cpu)) {
+ 		/*
+ 		 * Clear IPI flag, since we don't handle IPIs while
+@@ -218,8 +212,6 @@ static void pnv_smp_cpu_kill_self(void)
+ 
+ 	}
+ 
+-	/* Re-enable decrementer interrupts */
+-	mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
+ 	DBG("CPU%d coming online...\n", cpu);
+ }
+ 
diff --git a/patches.arch/powerpc-powernv-Provide-a-way-to-force-a-core-into-S.patch b/patches.arch/powerpc-powernv-Provide-a-way-to-force-a-core-into-S.patch
index 40f8a26c8d..3c50b9fa88 100644
--- a/patches.arch/powerpc-powernv-Provide-a-way-to-force-a-core-into-S.patch
+++ b/patches.arch/powerpc-powernv-Provide-a-way-to-force-a-core-into-S.patch
@@ -77,8 +77,6 @@ Acked-by: Michal Suchanek <msuchanek@suse.de>
  arch/powerpc/platforms/powernv/idle.c     | 81 +++++++++++++++++++++++++++++++
  6 files changed, 110 insertions(+)
 
-diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h
-index 7330150bfe34..4e14d2304d5f 100644
 --- a/arch/powerpc/include/asm/asm-prototypes.h
 +++ b/arch/powerpc/include/asm/asm-prototypes.h
 @@ -126,4 +126,7 @@ extern int __ucmpdi2(u64, u64);
@@ -89,8 +87,6 @@ index 7330150bfe34..4e14d2304d5f 100644
 +void pnv_power9_force_smt4_release(void);
 +
  #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
-diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
-index 0ec7b1e383ef..6a8e7a307f43 100644
 --- a/arch/powerpc/include/asm/paca.h
 +++ b/arch/powerpc/include/asm/paca.h
 @@ -32,6 +32,7 @@
@@ -110,11 +106,9 @@ index 0ec7b1e383ef..6a8e7a307f43 100644
  	/*
  	 * Pointer to an array which contains pointer
  	 * to the sibling threads' paca.
-diff --git a/arch/powerpc/include/asm/powernv.h b/arch/powerpc/include/asm/powernv.h
-index dc5f6a5d4575..d1c2d2e658cf 100644
 --- a/arch/powerpc/include/asm/powernv.h
 +++ b/arch/powerpc/include/asm/powernv.h
-@@ -40,6 +40,7 @@ static inline int pnv_npu2_handle_fault(struct npu_context *context,
+@@ -40,6 +40,7 @@ static inline int pnv_npu2_handle_fault(
  }
  
  static inline void pnv_tm_init(void) { }
@@ -122,11 +116,9 @@ index dc5f6a5d4575..d1c2d2e658cf 100644
  #endif
  
  #endif /* _ASM_POWERNV_H */
-diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
-index 04850b25cf3b..967d50c95fbc 100644
 --- a/arch/powerpc/kernel/asm-offsets.c
 +++ b/arch/powerpc/kernel/asm-offsets.c
-@@ -753,6 +753,7 @@ int main(void)
+@@ -757,6 +757,7 @@ int main(void)
  	OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
  	OFFSET(PACA_SIBLING_PACA_PTRS, paca_struct, thread_sibling_pacas);
  	OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
@@ -134,8 +126,6 @@ index 04850b25cf3b..967d50c95fbc 100644
  #define STOP_SPR(x, f)	OFFSET(x, paca_struct, stop_sprs.f)
  	STOP_SPR(STOP_PID, pid);
  	STOP_SPR(STOP_LDBAR, ldbar);
-diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
-index 29cbaafb86b9..7300e0ca9799 100644
 --- a/arch/powerpc/kernel/idle_book3s.S
 +++ b/arch/powerpc/kernel/idle_book3s.S
 @@ -339,6 +339,7 @@ power_enter_stop:
@@ -146,7 +136,7 @@ index 29cbaafb86b9..7300e0ca9799 100644
  
  	/*
  	 * pnv_wakeup_noloss() expects r12 to contain the SRR1 value so
-@@ -429,11 +430,29 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66);		\
+@@ -429,11 +430,29 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR
   * r3 contains desired PSSCR register value.
   */
  _GLOBAL(power9_idle_stop)
@@ -185,8 +175,6 @@ index 29cbaafb86b9..7300e0ca9799 100644
  	cmpd	cr4,r5,r4
  	bge	cr4,pnv_wakeup_tb_loss /* returns to caller */
  
-diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
-index cf7f0c48fdd5..96a6a6de13a6 100644
 --- a/arch/powerpc/platforms/powernv/idle.c
 +++ b/arch/powerpc/platforms/powernv/idle.c
 @@ -24,6 +24,7 @@
@@ -282,8 +270,5 @@ index cf7f0c48fdd5..96a6a6de13a6 100644
 +#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 +
  #ifdef CONFIG_HOTPLUG_CPU
- /*
-  * pnv_cpu_offline: A function that puts the CPU into the deepest
--- 
-2.13.6
-
+ static void pnv_program_cpu_hotplug_lpcr(unsigned int cpu, u64 lpcr_val)
+ {
diff --git a/series.conf b/series.conf
index 3d39129fd4..14ecd3ec91 100644
--- a/series.conf
+++ b/series.conf
@@ -6146,6 +6146,7 @@
 	patches.arch/powerpc-perf-add-thread-imc-pmu-support.patch
 	patches.arch/powerpc-mm-Fix-check-of-multiple-16G-pages-from-devi.patch
 	patches.arch/powerpc-powernv-Save-Restore-additional-SPRs-for-sto.patch
+	patches.arch/powerpc-powernv-Clear-PECE1-in-LPCR-via-stop-api-onl.patch
 	patches.arch/powerpc-mm-radix-Improve-_tlbiel_pid-to-be-usable-for-PWC-flushes.patch
 	patches.arch/powerpc-mm-radix-Improve-TLB-PWC-flushes.patch
 	patches.arch/powerpc-mm-radix-Avoid-flushing-the-PWC-on-every-flush_tlb_range.patch
author	Michal Suchanek <msuchanek@suse.de>	2019-01-18 12:09:07 +0100
committer	Michal Suchanek <msuchanek@suse.de>	2019-01-18 12:16:48 +0100
commit	b18d46108a6bacf34ae2a77896bce0b402def876 (patch)
tree	1b18f9957292d61d72f6be4340113c219650f58f
parent	dd6077c8eed7e05c2c9c81f1ad5c239067ab7ecb (diff)