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authorThomas Zimmermann <tzimmermann@suse.de>2019-01-18 12:54:54 +0100
committerThomas Zimmermann <tzimmermann@suse.de>2019-01-18 16:06:05 +0100
commit0535f767a1de395b930410bd7e6d1f378cb2a527 (patch)
tree0499a65c1cb70d23c69d51467c799de7a2adb81f
parentc5e2fde7b0e2242d0a28de85fce7f4fc9c498fee (diff)
drm/amd/display: Support amdgpu "max bpc" connector property (v2) (bsc#1113956)
-rw-r--r--patches.drm/0001-drm-amd-display-Support-amdgpu-max-bpc-connector-pro.patch104
-rw-r--r--series.conf1
2 files changed, 105 insertions, 0 deletions
diff --git a/patches.drm/0001-drm-amd-display-Support-amdgpu-max-bpc-connector-pro.patch b/patches.drm/0001-drm-amd-display-Support-amdgpu-max-bpc-connector-pro.patch
new file mode 100644
index 0000000000..ad307d5975
--- /dev/null
+++ b/patches.drm/0001-drm-amd-display-Support-amdgpu-max-bpc-connector-pro.patch
@@ -0,0 +1,104 @@
+From 07e3a1cfb0568b6d8d7862077029af96af6690ea Mon Sep 17 00:00:00 2001
+From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Date: Thu, 15 Nov 2018 17:21:34 -0500
+Subject: drm/amd/display: Support amdgpu "max bpc" connector property (v2)
+Git-commit: 07e3a1cfb0568b6d8d7862077029af96af6690ea
+Patch-mainline: v4.20-rc4
+References: bsc#1113956
+
+[Why]
+Many panels support more than 8bpc but some modes are unavailable while
+running at greater than 8bpc due to DP/HDMI bandwidth constraints.
+
+Support for more than 8bpc was added recently in the driver but it
+defaults to the maximum supported bpc - locking out these modes.
+
+This should be a user configurable option such that the user can select
+what bpc configuration they would like.
+
+[How]
+This patch adds support for getting and setting the amdgpu driver
+specific "max bpc" property on the connector.
+
+It also adds support for limiting the output bpc based on the property
+value. The default limitation is the lowest value in the range, 8bpc.
+This was the old value before the range was uncapped.
+
+This patch should be updated/replaced later once common drm support
+for max bpc lands.
+
+Bugzilla: https://bugs.freedesktop.org/108542
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=201585
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=200645
+Fixes: e03fd3f300f6 ("drm/amd/display: Do not limit color depth to 8bpc")
+
+v2: rebase on upstream (Alex)
+
+Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 16 ++++++++++++++++
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
+ 2 files changed, 17 insertions(+)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -2213,8 +2213,15 @@ static void update_stream_scaling_settin
+ static enum dc_color_depth
+ convert_color_depth_from_display_info(const struct drm_connector *connector)
+ {
++ struct dm_connector_state *dm_conn_state =
++ to_dm_connector_state(connector->state);
+ uint32_t bpc = connector->display_info.bpc;
+
++ /* TODO: Remove this when there's support for max_bpc in drm */
++ if (dm_conn_state && bpc > dm_conn_state->max_bpc)
++ /* Round down to nearest even number. */
++ bpc = dm_conn_state->max_bpc - (dm_conn_state->max_bpc & 1);
++
+ switch (bpc) {
+ case 0:
+ /* Temporary Work around, DRM don't parse color depth for
+@@ -2796,6 +2803,9 @@ int amdgpu_dm_connector_atomic_set_prope
+ } else if (property == adev->mode_info.underscan_property) {
+ dm_new_state->underscan_enable = val;
+ ret = 0;
++ } else if (property == adev->mode_info.max_bpc_property) {
++ dm_new_state->max_bpc = val;
++ ret = 0;
+ }
+
+ return ret;
+@@ -2838,6 +2848,9 @@ int amdgpu_dm_connector_atomic_get_prope
+ } else if (property == adev->mode_info.underscan_property) {
+ *val = dm_state->underscan_enable;
+ ret = 0;
++ } else if (property == adev->mode_info.max_bpc_property) {
++ *val = dm_state->max_bpc;
++ ret = 0;
+ }
+ return ret;
+ }
+@@ -3658,6 +3671,9 @@ void amdgpu_dm_connector_init_helper(str
+ drm_object_attach_property(&aconnector->base.base,
+ adev->mode_info.underscan_vborder_property,
+ 0);
++ drm_object_attach_property(&aconnector->base.base,
++ adev->mode_info.max_bpc_property,
++ 0);
+
+ }
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+@@ -215,6 +215,7 @@ struct dm_connector_state {
+ enum amdgpu_rmx_type scaling;
+ uint8_t underscan_vborder;
+ uint8_t underscan_hborder;
++ uint8_t max_bpc;
+ bool underscan_enable;
+ struct mod_freesync_user_enable user_enable;
+ bool freesync_capable;
diff --git a/series.conf b/series.conf
index c242d4469d..ded18059b6 100644
--- a/series.conf
+++ b/series.conf
@@ -41655,6 +41655,7 @@
patches.drm/drm-ast-fixed-cursor-may-disappear-sometimes.patch
patches.drm/0080-drm-vc4-Set-legacy_cursor_update-to-false-when-doing.patch
patches.drm/0084-drm-fb-helper-Blacklist-writeback-when-adding-connec.patch
+ patches.drm/0001-drm-amd-display-Support-amdgpu-max-bpc-connector-pro.patch
patches.drm/0083-drm-amdgpu-Add-missing-firmware-entry-for-HAINAN.patch
patches.drm/drm-i915-Write-GPU-relocs-harder-with-gen3.patch
patches.drivers/gpio-don-t-free-unallocated-ida-on-gpiochip_add_data.patch