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authorPetr Tesarik <ptesarik@suse.cz>2019-06-14 15:53:45 +0200
committerPetr Tesarik <ptesarik@suse.cz>2019-06-14 15:53:45 +0200
commit275d26083c460693823272e1ed63070c508169f0 (patch)
treed16da810d709d9143d39343b37e657938429949b
parent20f9eaa3c7738c3375712b47136f70f079ff8f54 (diff)
parenta94601fa56e89c97efbd10dde5a82581eb0b36b8 (diff)
Merge branch 'SLE15-SP1' into SLE15-SP1_EMBARGOrpm-4.12.14-197.4--sle15-sp1-updatesrpm-4.12.14-197.4
-rw-r--r--patches.drivers/RDMA-cxgb4-Don-t-expose-DMA-addresses.patch33
-rw-r--r--patches.drivers/RDMA-cxgb4-Use-sizeof-notation.patch444
-rw-r--r--patches.drivers/bnxt_en-Add-device-IDs-0x1806-and-0x1752-for-57500-d.patch51
-rw-r--r--patches.drivers/bnxt_en-Add-support-for-BCM957504.patch52
-rw-r--r--patches.drivers/brcmfmac-fix-NULL-pointer-derefence-during-USB-disco.patch239
-rw-r--r--patches.drivers/cxgb4-Enable-hash-filter-with-offload.patch299
-rw-r--r--patches.drivers/cxgb4-use-firmware-API-for-validating-filter-spec.patch159
-rw-r--r--patches.drivers/dmaengine-Replace-WARN_TAINT_ONCE-with-pr_warn_once.patch48
-rw-r--r--patches.drivers/dmaengine-at_xdmac-remove-BUG_ON-macro-in-tasklet.patch42
-rw-r--r--patches.drivers/dmaengine-ioat-constify-pci_device_id.patch44
-rw-r--r--patches.drivers/dmaengine-ioat-don-t-use-DMA_ERROR_CODE.patch80
-rw-r--r--patches.drivers/dmaengine-ioat-fix-prototype-of-ioat_enumerate_chann.patch58
-rw-r--r--patches.drivers/dmaengine-ioatdma-Add-Snow-Ridge-ioatdma-device-id.patch65
-rw-r--r--patches.drivers/dmaengine-ioatdma-Add-intr_coalesce-sysfs-entry.patch142
-rw-r--r--patches.drivers/dmaengine-ioatdma-add-descriptor-pre-fetch-support-f.patch108
-rw-r--r--patches.drivers/dmaengine-ioatdma-disable-DCA-enabling-on-IOATDMA-v3.patch47
-rw-r--r--patches.drivers/dmaengine-ioatdma-set-the-completion-address-registe.patch40
-rw-r--r--patches.drivers/dmaengine-ioatdma-support-latency-tolerance-report-L.patch93
-rw-r--r--patches.drivers/dmaengine-pl330-_stop-clear-interrupt-status.patch94
-rw-r--r--patches.drivers/dmaengine-tegra210-adma-Fix-crash-during-probe.patch87
-rw-r--r--patches.drivers/dmaengine-tegra210-adma-restore-channel-status.patch118
-rw-r--r--patches.drivers/drivers-dma-ioat-Remove-now-redundant-smp_read_barri.patch49
-rw-r--r--patches.drivers/hid-input-fix-a4tech-horizontal-wheel-custom-usage.patch90
-rw-r--r--patches.drivers/i2c-i801-Add-support-for-Intel-Comet-Lake.patch84
-rw-r--r--patches.drivers/i2c-synquacer-fix-synquacer_i2c_doxfer-return-value.patch39
-rw-r--r--patches.drivers/iw_cxgb4-Fix-qpid-leak.patch132
-rw-r--r--patches.drivers/mtd-spi-nor-intel-spi-Add-support-for-Intel-Ice-Lake.patch37
-rw-r--r--patches.drivers/spi-nor-intel-spi-Add-support-for-Intel-Comet-Lake-S.patch35
-rw-r--r--patches.drivers/spi-pxa2xx-Add-support-for-Intel-Comet-Lake.patch38
-rw-r--r--patches.drm/drm-add-non-desktop-quirk-for-Valve-HMDs.patch54
-rw-r--r--patches.drm/drm-add-non-desktop-quirks-to-Sensics-and-OSVR-heads.patch43
-rw-r--r--patches.drm/drm-amd-display-Fix-Divide-by-0-in-memory-calculatio.patch59
-rw-r--r--patches.drm/drm-amd-display-Set-stream-mode_changed-when-connect.patch58
-rw-r--r--patches.drm/drm-amd-display-fix-releasing-planes-when-exiting-od.patch44
-rw-r--r--patches.drm/drm-amdgpu-psp-move-psp-version-specific-function-po.patch62
-rw-r--r--patches.drm/drm-amdgpu-remove-ATPX_DGPU_REQ_POWER_FOR_DISPLAYS-c.patch39
-rw-r--r--patches.drm/drm-don-t-block-fb-changes-for-async-plane-updates.patch138
-rw-r--r--patches.drm/drm-etnaviv-avoid-DMA-API-warning-when-importing-buf.patch95
-rw-r--r--patches.drm/drm-gma500-cdv-Check-vbt-config-bits-when-detecting-.patch68
-rw-r--r--patches.drm/drm-i915-Maintain-consistent-documentation-subsectio.patch92
-rw-r--r--patches.drm/drm-i915-gvt-Initialize-intel_gvt_gtt_entry-in-stack.patch63
-rw-r--r--patches.drm/drm-lease-Make-sure-implicit-planes-are-leased.patch67
-rw-r--r--patches.drm/drm-msm-a5xx-fix-possible-object-reference-leak.patch75
-rw-r--r--patches.drm/drm-msm-fix-fb-references-in-async-update.patch49
-rw-r--r--patches.drm/drm-nouveau-bar-nv50-ensure-BAR-is-mapped.patch60
-rw-r--r--patches.drm/drm-omap-dsi-Fix-PM-for-display-blank-with-paired-ds.patch164
-rw-r--r--patches.drm/drm-panel-otm8009a-Add-delay-at-the-end-of-initializ.patch43
-rw-r--r--patches.drm/drm-pl111-fix-possible-object-reference-leak.patch70
-rw-r--r--patches.drm/drm-radeon-prefer-lower-reference-dividers.patch48
-rw-r--r--patches.drm/drm-sun4i-dsi-Change-the-start-delay-calculation.patch48
-rw-r--r--patches.drm/drm-sun4i-dsi-Enforce-boundaries-on-the-start-delay.patch44
-rw-r--r--patches.drm/drm-v3d-Handle-errors-from-IRQ-setup.patch99
-rw-r--r--patches.fixes/mdio_bus-Fix-use-after-free-on-device_register-fails.patch2
-rw-r--r--patches.suse/net-nfc-Fix-NULL-dereference-on-nfc_llcp_build_tlv-f.patch2
-rw-r--r--series.conf53
55 files changed, 4484 insertions, 2 deletions
diff --git a/patches.drivers/RDMA-cxgb4-Don-t-expose-DMA-addresses.patch b/patches.drivers/RDMA-cxgb4-Don-t-expose-DMA-addresses.patch
new file mode 100644
index 0000000000..7fc2e9d80c
--- /dev/null
+++ b/patches.drivers/RDMA-cxgb4-Don-t-expose-DMA-addresses.patch
@@ -0,0 +1,33 @@
+From: Leon Romanovsky <leonro@mellanox.com>
+Date: Mon, 20 May 2019 09:54:32 +0300
+Subject: RDMA/cxgb4: Don't expose DMA addresses
+Patch-mainline: Queued in subsystem maintainer repository
+Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git
+Git-commit: cae626b97851afc2219e7607183a9a23cbba3bef
+References: bsc#1136348 jsc#SLE-4684
+
+Change unconditional print of DMA address to be printed with special
+printk format type specifier.
+
+Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
+Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/infiniband/hw/cxgb4/cq.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/infiniband/hw/cxgb4/cq.c
++++ b/drivers/infiniband/hw/cxgb4/cq.c
+@@ -1134,9 +1134,9 @@ struct ib_cq *c4iw_create_cq(struct ib_d
+ mm2->len = PAGE_SIZE;
+ insert_mmap(ucontext, mm2);
+ }
+- pr_debug("cqid 0x%0x chp %p size %u memsize %zu, dma_addr 0x%0llx\n",
+- chp->cq.cqid, chp, chp->cq.size,
+- chp->cq.memsize, (unsigned long long)chp->cq.dma_addr);
++ pr_debug("cqid 0x%0x chp %p size %u memsize %zu, dma_addr %pad\n",
++ chp->cq.cqid, chp, chp->cq.size, chp->cq.memsize,
++ &chp->cq.dma_addr);
+ return &chp->ibcq;
+ err_free_mm2:
+ kfree(mm2);
diff --git a/patches.drivers/RDMA-cxgb4-Use-sizeof-notation.patch b/patches.drivers/RDMA-cxgb4-Use-sizeof-notation.patch
new file mode 100644
index 0000000000..d5397da773
--- /dev/null
+++ b/patches.drivers/RDMA-cxgb4-Use-sizeof-notation.patch
@@ -0,0 +1,444 @@
+From: Leon Romanovsky <leonro@mellanox.com>
+Date: Mon, 20 May 2019 09:54:31 +0300
+Subject: RDMA/cxgb4: Use sizeof() notation
+Patch-mainline: Queued in subsystem maintainer repository
+Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git
+Git-commit: 34d568930b87e0dd32c5dbe83a835959f2fc6107
+References: bsc#1136348 jsc#SLE-4684
+
+Convert various sizeof call sites to be written in standard format
+sizeof().
+
+Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
+Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/infiniband/hw/cxgb4/cm.c | 21 ++++++++-------
+ drivers/infiniband/hw/cxgb4/cq.c | 8 ++---
+ drivers/infiniband/hw/cxgb4/device.c | 9 ++----
+ drivers/infiniband/hw/cxgb4/mem.c | 5 ++-
+ drivers/infiniband/hw/cxgb4/provider.c | 1
+ drivers/infiniband/hw/cxgb4/qp.c | 46 +++++++++++++++------------------
+ drivers/infiniband/hw/cxgb4/resource.c | 16 +++++------
+ 7 files changed, 53 insertions(+), 53 deletions(-)
+
+--- a/drivers/infiniband/hw/cxgb4/cm.c
++++ b/drivers/infiniband/hw/cxgb4/cm.c
+@@ -952,7 +952,7 @@ static int send_mpa_req(struct c4iw_ep *
+ mpalen = sizeof(*mpa) + ep->plen;
+ if (mpa_rev_to_use == 2)
+ mpalen += sizeof(struct mpa_v2_conn_params);
+- wrlen = roundup(mpalen + sizeof *req, 16);
++ wrlen = roundup(mpalen + sizeof(*req), 16);
+ skb = get_skb(skb, wrlen, GFP_KERNEL);
+ if (!skb) {
+ connect_reply_upcall(ep, -ENOMEM);
+@@ -996,8 +996,9 @@ static int send_mpa_req(struct c4iw_ep *
+ }
+
+ if (mpa_rev_to_use == 2) {
+- mpa->private_data_size = htons(ntohs(mpa->private_data_size) +
+- sizeof (struct mpa_v2_conn_params));
++ mpa->private_data_size =
++ htons(ntohs(mpa->private_data_size) +
++ sizeof(struct mpa_v2_conn_params));
+ pr_debug("initiator ird %u ord %u\n", ep->ird,
+ ep->ord);
+ mpa_v2_params.ird = htons((u16)ep->ird);
+@@ -1056,7 +1057,7 @@ static int send_mpa_reject(struct c4iw_e
+ mpalen = sizeof(*mpa) + plen;
+ if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn)
+ mpalen += sizeof(struct mpa_v2_conn_params);
+- wrlen = roundup(mpalen + sizeof *req, 16);
++ wrlen = roundup(mpalen + sizeof(*req), 16);
+
+ skb = get_skb(NULL, wrlen, GFP_KERNEL);
+ if (!skb) {
+@@ -1087,8 +1088,9 @@ static int send_mpa_reject(struct c4iw_e
+
+ if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) {
+ mpa->flags |= MPA_ENHANCED_RDMA_CONN;
+- mpa->private_data_size = htons(ntohs(mpa->private_data_size) +
+- sizeof (struct mpa_v2_conn_params));
++ mpa->private_data_size =
++ htons(ntohs(mpa->private_data_size) +
++ sizeof(struct mpa_v2_conn_params));
+ mpa_v2_params.ird = htons(((u16)ep->ird) |
+ (peer2peer ? MPA_V2_PEER2PEER_MODEL :
+ 0));
+@@ -1135,7 +1137,7 @@ static int send_mpa_reply(struct c4iw_ep
+ mpalen = sizeof(*mpa) + plen;
+ if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn)
+ mpalen += sizeof(struct mpa_v2_conn_params);
+- wrlen = roundup(mpalen + sizeof *req, 16);
++ wrlen = roundup(mpalen + sizeof(*req), 16);
+
+ skb = get_skb(NULL, wrlen, GFP_KERNEL);
+ if (!skb) {
+@@ -1170,8 +1172,9 @@ static int send_mpa_reply(struct c4iw_ep
+
+ if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) {
+ mpa->flags |= MPA_ENHANCED_RDMA_CONN;
+- mpa->private_data_size = htons(ntohs(mpa->private_data_size) +
+- sizeof (struct mpa_v2_conn_params));
++ mpa->private_data_size =
++ htons(ntohs(mpa->private_data_size) +
++ sizeof(struct mpa_v2_conn_params));
+ mpa_v2_params.ird = htons((u16)ep->ird);
+ mpa_v2_params.ord = htons((u16)ep->ord);
+ if (peer2peer && (ep->mpa_attr.p2p_type !=
+--- a/drivers/infiniband/hw/cxgb4/cq.c
++++ b/drivers/infiniband/hw/cxgb4/cq.c
+@@ -41,7 +41,7 @@ static int destroy_cq(struct c4iw_rdev *
+ int wr_len;
+ int ret;
+
+- wr_len = sizeof *res_wr + sizeof *res;
++ wr_len = sizeof(*res_wr) + sizeof(*res);
+ set_wr_txq(skb, CPL_PRIORITY_CONTROL, 0);
+
+ res_wr = __skb_put_zero(skb, wr_len);
+@@ -115,7 +115,7 @@ static int create_cq(struct c4iw_rdev *r
+ }
+
+ /* build fw_ri_res_wr */
+- wr_len = sizeof *res_wr + sizeof *res;
++ wr_len = sizeof(*res_wr) + sizeof(*res);
+
+ skb = alloc_skb(wr_len, GFP_KERNEL);
+ if (!skb) {
+@@ -1094,10 +1094,10 @@ struct ib_cq *c4iw_create_cq(struct ib_d
+
+ if (ucontext) {
+ ret = -ENOMEM;
+- mm = kmalloc(sizeof *mm, GFP_KERNEL);
++ mm = kmalloc(sizeof(*mm), GFP_KERNEL);
+ if (!mm)
+ goto err_remove_handle;
+- mm2 = kmalloc(sizeof *mm2, GFP_KERNEL);
++ mm2 = kmalloc(sizeof(*mm2), GFP_KERNEL);
+ if (!mm2)
+ goto err_free_mm;
+
+--- a/drivers/infiniband/hw/cxgb4/device.c
++++ b/drivers/infiniband/hw/cxgb4/device.c
+@@ -338,7 +338,7 @@ static int qp_open(struct inode *inode,
+ struct c4iw_debugfs_data *qpd;
+ int count = 1;
+
+- qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
++ qpd = kmalloc(sizeof(*qpd), GFP_KERNEL);
+ if (!qpd)
+ return -ENOMEM;
+
+@@ -427,7 +427,7 @@ static int stag_open(struct inode *inode
+ int ret = 0;
+ int count = 1;
+
+- stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
++ stagd = kmalloc(sizeof(*stagd), GFP_KERNEL);
+ if (!stagd) {
+ ret = -ENOMEM;
+ goto out;
+@@ -1081,7 +1081,7 @@ static void *c4iw_uld_add(const struct c
+ pr_info("Chelsio T4/T5 RDMA Driver - version %s\n",
+ DRV_VERSION);
+
+- ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
++ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+ if (!ctx) {
+ ctx = ERR_PTR(-ENOMEM);
+ goto out;
+@@ -1249,10 +1249,9 @@ static int c4iw_uld_state_change(void *h
+ case CXGB4_STATE_START_RECOVERY:
+ pr_info("%s: Fatal Error\n", pci_name(ctx->lldi.pdev));
+ if (ctx->dev) {
+- struct ib_event event;
++ struct ib_event event = {};
+
+ ctx->dev->rdev.flags |= T4_FATAL_ERROR;
+- memset(&event, 0, sizeof event);
+ event.event = IB_EVENT_DEVICE_FATAL;
+ event.device = &ctx->dev->ibdev;
+ ib_dispatch_event(&event);
+--- a/drivers/infiniband/hw/cxgb4/mem.c
++++ b/drivers/infiniband/hw/cxgb4/mem.c
+@@ -130,8 +130,9 @@ static int _c4iw_write_mem_inline(struct
+
+ copy_len = len > C4IW_MAX_INLINE_SIZE ? C4IW_MAX_INLINE_SIZE :
+ len;
+- wr_len = roundup(sizeof *req + sizeof *sc +
+- roundup(copy_len, T4_ULPTX_MIN_IO), 16);
++ wr_len = roundup(sizeof(*req) + sizeof(*sc) +
++ roundup(copy_len, T4_ULPTX_MIN_IO),
++ 16);
+
+ if (!skb) {
+ skb = alloc_skb(wr_len, GFP_KERNEL | __GFP_NOFAIL);
+--- a/drivers/infiniband/hw/cxgb4/provider.c
++++ b/drivers/infiniband/hw/cxgb4/provider.c
+@@ -287,7 +287,6 @@ static int c4iw_query_device(struct ib_d
+ return -EINVAL;
+
+ dev = to_c4iw_dev(ibdev);
+- memset(props, 0, sizeof *props);
+ memcpy(&props->sys_image_guid, dev->rdev.lldi.ports[0]->dev_addr, 6);
+ props->hw_ver = CHELSIO_CHIP_RELEASE(dev->rdev.lldi.adapter_type);
+ props->fw_ver = dev->rdev.lldi.fw_vers;
+--- a/drivers/infiniband/hw/cxgb4/qp.c
++++ b/drivers/infiniband/hw/cxgb4/qp.c
+@@ -302,7 +302,7 @@ static int create_qp(struct c4iw_rdev *r
+ wq->rq.msn = 1;
+
+ /* build fw_ri_res_wr */
+- wr_len = sizeof *res_wr + 2 * sizeof *res;
++ wr_len = sizeof(*res_wr) + 2 * sizeof(*res);
+ if (need_rq)
+ wr_len += sizeof(*res);
+ skb = alloc_skb(wr_len, GFP_KERNEL);
+@@ -438,7 +438,7 @@ static int build_immd(struct t4_sq *sq,
+ rem -= len;
+ }
+ }
+- len = roundup(plen + sizeof *immdp, 16) - (plen + sizeof *immdp);
++ len = roundup(plen + sizeof(*immdp), 16) - (plen + sizeof(*immdp));
+ if (len)
+ memset(dstp, 0, len);
+ immdp->op = FW_RI_DATA_IMMD;
+@@ -527,7 +527,7 @@ static int build_rdma_send(struct t4_sq
+ T4_MAX_SEND_INLINE, &plen);
+ if (ret)
+ return ret;
+- size = sizeof wqe->send + sizeof(struct fw_ri_immd) +
++ size = sizeof(wqe->send) + sizeof(struct fw_ri_immd) +
+ plen;
+ } else {
+ ret = build_isgl((__be64 *)sq->queue,
+@@ -536,7 +536,7 @@ static int build_rdma_send(struct t4_sq
+ wr->sg_list, wr->num_sge, &plen);
+ if (ret)
+ return ret;
+- size = sizeof wqe->send + sizeof(struct fw_ri_isgl) +
++ size = sizeof(wqe->send) + sizeof(struct fw_ri_isgl) +
+ wr->num_sge * sizeof(struct fw_ri_sge);
+ }
+ } else {
+@@ -544,7 +544,7 @@ static int build_rdma_send(struct t4_sq
+ wqe->send.u.immd_src[0].r1 = 0;
+ wqe->send.u.immd_src[0].r2 = 0;
+ wqe->send.u.immd_src[0].immdlen = 0;
+- size = sizeof wqe->send + sizeof(struct fw_ri_immd);
++ size = sizeof(wqe->send) + sizeof(struct fw_ri_immd);
+ plen = 0;
+ }
+ *len16 = DIV_ROUND_UP(size, 16);
+@@ -578,7 +578,7 @@ static int build_rdma_write(struct t4_sq
+ T4_MAX_WRITE_INLINE, &plen);
+ if (ret)
+ return ret;
+- size = sizeof wqe->write + sizeof(struct fw_ri_immd) +
++ size = sizeof(wqe->write) + sizeof(struct fw_ri_immd) +
+ plen;
+ } else {
+ ret = build_isgl((__be64 *)sq->queue,
+@@ -587,7 +587,7 @@ static int build_rdma_write(struct t4_sq
+ wr->sg_list, wr->num_sge, &plen);
+ if (ret)
+ return ret;
+- size = sizeof wqe->write + sizeof(struct fw_ri_isgl) +
++ size = sizeof(wqe->write) + sizeof(struct fw_ri_isgl) +
+ wr->num_sge * sizeof(struct fw_ri_sge);
+ }
+ } else {
+@@ -595,7 +595,7 @@ static int build_rdma_write(struct t4_sq
+ wqe->write.u.immd_src[0].r1 = 0;
+ wqe->write.u.immd_src[0].r2 = 0;
+ wqe->write.u.immd_src[0].immdlen = 0;
+- size = sizeof wqe->write + sizeof(struct fw_ri_immd);
++ size = sizeof(wqe->write) + sizeof(struct fw_ri_immd);
+ plen = 0;
+ }
+ *len16 = DIV_ROUND_UP(size, 16);
+@@ -682,7 +682,7 @@ static int build_rdma_read(union t4_wr *
+ }
+ wqe->read.r2 = 0;
+ wqe->read.r5 = 0;
+- *len16 = DIV_ROUND_UP(sizeof wqe->read, 16);
++ *len16 = DIV_ROUND_UP(sizeof(wqe->read), 16);
+ return 0;
+ }
+
+@@ -765,8 +765,8 @@ static int build_rdma_recv(struct c4iw_q
+ &wqe->recv.isgl, wr->sg_list, wr->num_sge, NULL);
+ if (ret)
+ return ret;
+- *len16 = DIV_ROUND_UP(sizeof wqe->recv +
+- wr->num_sge * sizeof(struct fw_ri_sge), 16);
++ *len16 = DIV_ROUND_UP(
++ sizeof(wqe->recv) + wr->num_sge * sizeof(struct fw_ri_sge), 16);
+ return 0;
+ }
+
+@@ -885,7 +885,7 @@ static int build_inv_stag(union t4_wr *w
+ {
+ wqe->inv.stag_inv = cpu_to_be32(wr->ex.invalidate_rkey);
+ wqe->inv.r2 = 0;
+- *len16 = DIV_ROUND_UP(sizeof wqe->inv, 16);
++ *len16 = DIV_ROUND_UP(sizeof(wqe->inv), 16);
+ return 0;
+ }
+
+@@ -1605,7 +1605,7 @@ static void post_terminate(struct c4iw_q
+ FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16)));
+
+ wqe->u.terminate.type = FW_RI_TYPE_TERMINATE;
+- wqe->u.terminate.immdlen = cpu_to_be32(sizeof *term);
++ wqe->u.terminate.immdlen = cpu_to_be32(sizeof(*term));
+ term = (struct terminate_message *)wqe->u.terminate.termmsg;
+ if (qhp->attr.layer_etype == (LAYER_MPA|DDP_LLP)) {
+ term->layer_etype = qhp->attr.layer_etype;
+@@ -1750,16 +1750,15 @@ static int rdma_fini(struct c4iw_dev *rh
+ static void build_rtr_msg(u8 p2p_type, struct fw_ri_init *init)
+ {
+ pr_debug("p2p_type = %d\n", p2p_type);
+- memset(&init->u, 0, sizeof init->u);
++ memset(&init->u, 0, sizeof(init->u));
+ switch (p2p_type) {
+ case FW_RI_INIT_P2PTYPE_RDMA_WRITE:
+ init->u.write.opcode = FW_RI_RDMA_WRITE_WR;
+ init->u.write.stag_sink = cpu_to_be32(1);
+ init->u.write.to_sink = cpu_to_be64(1);
+ init->u.write.u.immd_src[0].op = FW_RI_DATA_IMMD;
+- init->u.write.len16 = DIV_ROUND_UP(sizeof init->u.write +
+- sizeof(struct fw_ri_immd),
+- 16);
++ init->u.write.len16 = DIV_ROUND_UP(
++ sizeof(init->u.write) + sizeof(struct fw_ri_immd), 16);
+ break;
+ case FW_RI_INIT_P2PTYPE_READ_REQ:
+ init->u.write.opcode = FW_RI_RDMA_READ_WR;
+@@ -1767,7 +1766,7 @@ static void build_rtr_msg(u8 p2p_type, s
+ init->u.read.to_src_lo = cpu_to_be32(1);
+ init->u.read.stag_sink = cpu_to_be32(1);
+ init->u.read.to_sink_lo = cpu_to_be32(1);
+- init->u.read.len16 = DIV_ROUND_UP(sizeof init->u.read, 16);
++ init->u.read.len16 = DIV_ROUND_UP(sizeof(init->u.read), 16);
+ break;
+ }
+ }
+@@ -1781,7 +1780,7 @@ static int rdma_init(struct c4iw_dev *rh
+ pr_debug("qhp %p qid 0x%x tid %u ird %u ord %u\n", qhp,
+ qhp->wq.sq.qid, qhp->ep->hwtid, qhp->ep->ird, qhp->ep->ord);
+
+- skb = alloc_skb(sizeof *wqe, GFP_KERNEL);
++ skb = alloc_skb(sizeof(*wqe), GFP_KERNEL);
+ if (!skb) {
+ ret = -ENOMEM;
+ goto out;
+@@ -2303,7 +2302,7 @@ struct ib_qp *c4iw_create_qp(struct ib_p
+ ucontext->key += PAGE_SIZE;
+ }
+ spin_unlock(&ucontext->mmap_lock);
+- ret = ib_copy_to_udata(udata, &uresp, sizeof uresp);
++ ret = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
+ if (ret)
+ goto err_free_ma_sync_key;
+ sq_key_mm->key = uresp.sq_key;
+@@ -2388,7 +2387,7 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp
+ struct c4iw_dev *rhp;
+ struct c4iw_qp *qhp;
+ enum c4iw_qp_attr_mask mask = 0;
+- struct c4iw_qp_attributes attrs;
++ struct c4iw_qp_attributes attrs = {};
+
+ pr_debug("ib_qp %p\n", ibqp);
+
+@@ -2400,7 +2399,6 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp
+ if (!attr_mask)
+ return 0;
+
+- memset(&attrs, 0, sizeof attrs);
+ qhp = to_c4iw_qp(ibqp);
+ rhp = qhp->rhp;
+
+@@ -2484,8 +2482,8 @@ int c4iw_ib_query_qp(struct ib_qp *ibqp,
+ {
+ struct c4iw_qp *qhp = to_c4iw_qp(ibqp);
+
+- memset(attr, 0, sizeof *attr);
+- memset(init_attr, 0, sizeof *init_attr);
++ memset(attr, 0, sizeof(*attr));
++ memset(init_attr, 0, sizeof(*init_attr));
+ attr->qp_state = to_ib_qp_state(qhp->attr.state);
+ init_attr->cap.max_send_wr = qhp->attr.sq_num_entries;
+ init_attr->cap.max_recv_wr = qhp->attr.rq_num_entries;
+--- a/drivers/infiniband/hw/cxgb4/resource.c
++++ b/drivers/infiniband/hw/cxgb4/resource.c
+@@ -126,7 +126,7 @@ u32 c4iw_get_cqid(struct c4iw_rdev *rdev
+ rdev->stats.qid.cur += rdev->qpmask + 1;
+ mutex_unlock(&rdev->stats.lock);
+ for (i = qid+1; i & rdev->qpmask; i++) {
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto out;
+ entry->qid = i;
+@@ -137,13 +137,13 @@ u32 c4iw_get_cqid(struct c4iw_rdev *rdev
+ * now put the same ids on the qp list since they all
+ * map to the same db/gts page.
+ */
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto out;
+ entry->qid = qid;
+ list_add_tail(&entry->entry, &uctx->qpids);
+ for (i = qid+1; i & rdev->qpmask; i++) {
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto out;
+ entry->qid = i;
+@@ -165,7 +165,7 @@ void c4iw_put_cqid(struct c4iw_rdev *rde
+ {
+ struct c4iw_qid_list *entry;
+
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ return;
+ pr_debug("qid 0x%x\n", qid);
+@@ -200,7 +200,7 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev
+ rdev->stats.qid.cur += rdev->qpmask + 1;
+ mutex_unlock(&rdev->stats.lock);
+ for (i = qid+1; i & rdev->qpmask; i++) {
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto out;
+ entry->qid = i;
+@@ -211,13 +211,13 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev
+ * now put the same ids on the cq list since they all
+ * map to the same db/gts page.
+ */
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto out;
+ entry->qid = qid;
+ list_add_tail(&entry->entry, &uctx->cqids);
+ for (i = qid; i & rdev->qpmask; i++) {
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto out;
+ entry->qid = i;
+@@ -239,7 +239,7 @@ void c4iw_put_qpid(struct c4iw_rdev *rde
+ {
+ struct c4iw_qid_list *entry;
+
+- entry = kmalloc(sizeof *entry, GFP_KERNEL);
++ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ return;
+ pr_debug("qid 0x%x\n", qid);
diff --git a/patches.drivers/bnxt_en-Add-device-IDs-0x1806-and-0x1752-for-57500-d.patch b/patches.drivers/bnxt_en-Add-device-IDs-0x1806-and-0x1752-for-57500-d.patch
new file mode 100644
index 0000000000..c045fad9cb
--- /dev/null
+++ b/patches.drivers/bnxt_en-Add-device-IDs-0x1806-and-0x1752-for-57500-d.patch
@@ -0,0 +1,51 @@
+From: Michael Chan <michael.chan@broadcom.com>
+Date: Sun, 5 May 2019 07:17:08 -0400
+Subject: bnxt_en: Add device IDs 0x1806 and 0x1752 for 57500 devices.
+Patch-mainline: v5.2-rc1
+Git-commit: 51fec80d3a669cdc3950973cb2a9045adeb0e7f0
+References: bsc#1137224
+
+0x1806 and 0x1752 are VF variant and PF variant of the 57500 chip
+family.
+
+Signed-off-by: Michael Chan <michael.chan@broadcom.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/net/ethernet/broadcom/bnxt/bnxt.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
++++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+@@ -113,6 +113,7 @@ enum board_idx {
+ BCM5745x_NPAR,
+ BCM57508,
+ BCM57504,
++ BCM57502,
+ BCM58802,
+ BCM58804,
+ BCM58808,
+@@ -157,6 +158,7 @@ static const struct {
+ [BCM5745x_NPAR] = { "Broadcom BCM5745x NetXtreme-E Ethernet Partition" },
+ [BCM57508] = { "Broadcom BCM57508 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
+ [BCM57504] = { "Broadcom BCM57504 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
++ [BCM57502] = { "Broadcom BCM57502 NetXtreme-E 10Gb/25Gb/50Gb Ethernet" },
+ [BCM58802] = { "Broadcom BCM58802 NetXtreme-S 10Gb/25Gb/40Gb/50Gb Ethernet" },
+ [BCM58804] = { "Broadcom BCM58804 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
+ [BCM58808] = { "Broadcom BCM58808 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
+@@ -204,6 +206,7 @@ static const struct pci_device_id bnxt_p
+ { PCI_VDEVICE(BROADCOM, 0x16f1), .driver_data = BCM57452 },
+ { PCI_VDEVICE(BROADCOM, 0x1750), .driver_data = BCM57508 },
+ { PCI_VDEVICE(BROADCOM, 0x1751), .driver_data = BCM57504 },
++ { PCI_VDEVICE(BROADCOM, 0x1752), .driver_data = BCM57502 },
+ { PCI_VDEVICE(BROADCOM, 0xd802), .driver_data = BCM58802 },
+ { PCI_VDEVICE(BROADCOM, 0xd804), .driver_data = BCM58804 },
+ #ifdef CONFIG_BNXT_SRIOV
+@@ -215,6 +218,7 @@ static const struct pci_device_id bnxt_p
+ { PCI_VDEVICE(BROADCOM, 0x16dc), .driver_data = NETXTREME_E_VF },
+ { PCI_VDEVICE(BROADCOM, 0x16e1), .driver_data = NETXTREME_C_VF },
+ { PCI_VDEVICE(BROADCOM, 0x16e5), .driver_data = NETXTREME_C_VF },
++ { PCI_VDEVICE(BROADCOM, 0x1806), .driver_data = NETXTREME_E_P5_VF },
+ { PCI_VDEVICE(BROADCOM, 0x1807), .driver_data = NETXTREME_E_P5_VF },
+ { PCI_VDEVICE(BROADCOM, 0xd800), .driver_data = NETXTREME_S_VF },
+ #endif
diff --git a/patches.drivers/bnxt_en-Add-support-for-BCM957504.patch b/patches.drivers/bnxt_en-Add-support-for-BCM957504.patch
new file mode 100644
index 0000000000..849df71b36
--- /dev/null
+++ b/patches.drivers/bnxt_en-Add-support-for-BCM957504.patch
@@ -0,0 +1,52 @@
+From: Erik Burrows <erik.burrows@broadcom.com>
+Date: Tue, 19 Feb 2019 05:31:13 -0500
+Subject: bnxt_en: Add support for BCM957504
+Patch-mainline: v5.1-rc1
+Git-commit: c6cc32a2133cb1eb5aa28ced1852aab2aeaf357a
+References: bsc#1137224
+
+Add support for BCM957504 with device ID 1751
+
+Signed-off-by: Erik Burrows <erik.burrows@broadcom.com>
+Signed-off-by: Michael Chan <michael.chan@broadcom.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/net/ethernet/broadcom/bnxt/bnxt.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
++++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+@@ -1,7 +1,7 @@
+ /* Broadcom NetXtreme-C/E network driver.
+ *
+ * Copyright (c) 2014-2016 Broadcom Corporation
+- * Copyright (c) 2016-2018 Broadcom Limited
++ * Copyright (c) 2016-2019 Broadcom Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+@@ -112,6 +112,7 @@ enum board_idx {
+ BCM57454,
+ BCM5745x_NPAR,
+ BCM57508,
++ BCM57504,
+ BCM58802,
+ BCM58804,
+ BCM58808,
+@@ -155,6 +156,7 @@ static const struct {
+ [BCM57454] = { "Broadcom BCM57454 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
+ [BCM5745x_NPAR] = { "Broadcom BCM5745x NetXtreme-E Ethernet Partition" },
+ [BCM57508] = { "Broadcom BCM57508 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
++ [BCM57504] = { "Broadcom BCM57504 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
+ [BCM58802] = { "Broadcom BCM58802 NetXtreme-S 10Gb/25Gb/40Gb/50Gb Ethernet" },
+ [BCM58804] = { "Broadcom BCM58804 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
+ [BCM58808] = { "Broadcom BCM58808 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
+@@ -201,6 +203,7 @@ static const struct pci_device_id bnxt_p
+ { PCI_VDEVICE(BROADCOM, 0x16f0), .driver_data = BCM58808 },
+ { PCI_VDEVICE(BROADCOM, 0x16f1), .driver_data = BCM57452 },
+ { PCI_VDEVICE(BROADCOM, 0x1750), .driver_data = BCM57508 },
++ { PCI_VDEVICE(BROADCOM, 0x1751), .driver_data = BCM57504 },
+ { PCI_VDEVICE(BROADCOM, 0xd802), .driver_data = BCM58802 },
+ { PCI_VDEVICE(BROADCOM, 0xd804), .driver_data = BCM58804 },
+ #ifdef CONFIG_BNXT_SRIOV
diff --git a/patches.drivers/brcmfmac-fix-NULL-pointer-derefence-during-USB-disco.patch b/patches.drivers/brcmfmac-fix-NULL-pointer-derefence-during-USB-disco.patch
new file mode 100644
index 0000000000..39d4741b71
--- /dev/null
+++ b/patches.drivers/brcmfmac-fix-NULL-pointer-derefence-during-USB-disco.patch
@@ -0,0 +1,239 @@
+From 5cdb0ef6144f47440850553579aa923c20a63f23 Mon Sep 17 00:00:00 2001
+From: Piotr Figiel <p.figiel@camlintechnologies.com>
+Date: Mon, 4 Mar 2019 15:42:52 +0000
+Subject: [PATCH] brcmfmac: fix NULL pointer derefence during USB disconnect
+Git-commit: 5cdb0ef6144f47440850553579aa923c20a63f23
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+In case USB disconnect happens at the moment transmitting workqueue is in
+progress the underlying interface may be gone causing a NULL pointer
+dereference. Add synchronization of the workqueue destruction with the
+detach implementation in core so that the transmitting workqueue is stopped
+during detach before the interfaces are removed.
+
+Fix following Oops:
+
+Unable to handle kernel NULL pointer dereference at virtual address 00000008
+pgd = 9e6a802d
+[00000008] *pgd=00000000
+Internal error: Oops: 5 [#1] PREEMPT SMP ARM
+Modules linked in: nf_log_ipv4 nf_log_common xt_LOG xt_limit iptable_mangle
+xt_connmark xt_tcpudp xt_conntrack nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4
+iptable_filter ip_tables x_tables usb_f_mass_storage usb_f_rndis u_ether
+usb_serial_simple usbserial cdc_acm brcmfmac brcmutil smsc95xx usbnet
+ci_hdrc_imx ci_hdrc ulpi usbmisc_imx 8250_exar 8250_pci 8250 8250_base
+libcomposite configfs udc_core
+Cpu: 0 PID: 7 Comm: kworker/u8:0 Not tainted 4.19.23-00076-g03740aa-dirty #102
+Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
+Workqueue: brcmf_fws_wq brcmf_fws_dequeue_worker [brcmfmac]
+PC is at brcmf_txfinalize+0x34/0x90 [brcmfmac]
+LR is at brcmf_fws_dequeue_worker+0x218/0x33c [brcmfmac]
+pc : [<7f0dee64>] lr : [<7f0e4140>] psr: 60010093
+sp : ee8abef0 ip : 00000000 fp : edf38000
+R10: ffffffed r9 : edf38970 r8 : edf38004
+r7 : edf3e970 r6 : 00000000 r5 : ede69000 r4 : 00000000
+r3 : 00000a97 r2 : 00000000 r1 : 0000888e r0 : ede69000
+Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment none
+Control: 10c5387d Table: 7d03c04a DAC: 00000051
+Process kworker/u8:0 (pid: 7, stack limit = 0x24ec3e04)
+Stack: (0xee8abef0 to 0xee8ac000)
+Bee0: ede69000 00000000 ed56c3e0 7f0e4140
+Bf00: 00000001 00000000 edf38004 edf3e99c ed56c3e0 80d03d00 edfea43a edf3e970
+Bf20: ee809880 ee804200 ee971100 00000000 edf3e974 00000000 ee804200 80135a70
+Bf40: 80d03d00 ee804218 ee809880 ee809894 ee804200 80d03d00 ee804218 ee8aa000
+Bf60: 00000088 80135d5c 00000000 ee829f00 ee829dc0 00000000 ee809880 80135d30
+Bf80: ee829f1c ee873eac 00000000 8013b1a0 ee829dc0 8013b07c 00000000 00000000
+Bfa0: 00000000 00000000 00000000 801010e8 00000000 00000000 00000000 00000000
+Bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+Bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
+[<7f0dee64>] (brcmf_txfinalize [brcmfmac]) from [<7f0e4140>] (brcmf_fws_dequeue_worker+0x218/0x33c [brcmfmac])
+[<7f0e4140>] (brcmf_fws_dequeue_worker [brcmfmac]) from [<80135a70>] (process_one_work+0x138/0x3f8)
+[<80135a70>] (process_one_work) from [<80135d5c>] (worker_thread+0x2c/0x554)
+[<80135d5c>] (worker_thread) from [<8013b1a0>] (kthread+0x124/0x154)
+[<8013b1a0>] (kthread) from [<801010e8>] (ret_from_fork+0x14/0x2c)
+Exception stack(0xee8abfb0 to 0xee8abff8)
+
+Bfa0: 00000000 00000000 00000000 00000000
+Bfe0: 00000000 00000000 00000000 00000000 00000013 00000000
+Code: e1530001 0a000007 e3560000 e1a00005 (05942008)
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---[ end trace 079239dd31c86e90 ]---
+
+Signed-off-by: Piotr Figiel <p.figiel@camlintechnologies.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c | 11 +++++++++--
+ drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h | 6 ++++--
+ drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c | 4 +++-
+ .../net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c | 16 ++++++++++++----
+ .../net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h | 3 ++-
+ drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c | 10 ++++++++--
+ drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h | 3 ++-
+ 7 files changed, 40 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c
+index 73d3c1a0a7c9..98b168736df0 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c
+@@ -490,11 +490,18 @@ int brcmf_proto_bcdc_attach(struct brcmf_pub *drvr)
+ return -ENOMEM;
+ }
+
+-void brcmf_proto_bcdc_detach(struct brcmf_pub *drvr)
++void brcmf_proto_bcdc_detach_pre_delif(struct brcmf_pub *drvr)
++{
++ struct brcmf_bcdc *bcdc = drvr->proto->pd;
++
++ brcmf_fws_detach_pre_delif(bcdc->fws);
++}
++
++void brcmf_proto_bcdc_detach_post_delif(struct brcmf_pub *drvr)
+ {
+ struct brcmf_bcdc *bcdc = drvr->proto->pd;
+
+ drvr->proto->pd = NULL;
+- brcmf_fws_detach(bcdc->fws);
++ brcmf_fws_detach_post_delif(bcdc->fws);
+ kfree(bcdc);
+ }
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h
+index 3b0e9eff21b5..4bc52240ccea 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h
+@@ -18,14 +18,16 @@
+
+ #ifdef CONFIG_BRCMFMAC_PROTO_BCDC
+ int brcmf_proto_bcdc_attach(struct brcmf_pub *drvr);
+-void brcmf_proto_bcdc_detach(struct brcmf_pub *drvr);
++void brcmf_proto_bcdc_detach_pre_delif(struct brcmf_pub *drvr);
++void brcmf_proto_bcdc_detach_post_delif(struct brcmf_pub *drvr);
+ void brcmf_proto_bcdc_txflowblock(struct device *dev, bool state);
+ void brcmf_proto_bcdc_txcomplete(struct device *dev, struct sk_buff *txp,
+ bool success);
+ struct brcmf_fws_info *drvr_to_fws(struct brcmf_pub *drvr);
+ #else
+ static inline int brcmf_proto_bcdc_attach(struct brcmf_pub *drvr) { return 0; }
+-static inline void brcmf_proto_bcdc_detach(struct brcmf_pub *drvr) {}
++static void brcmf_proto_bcdc_detach_pre_delif(struct brcmf_pub *drvr) {};
++static inline void brcmf_proto_bcdc_detach_post_delif(struct brcmf_pub *drvr) {}
+ #endif
+
+ #endif /* BRCMFMAC_BCDC_H */
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c
+index 5f3548b13639..6faeb761c27e 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c
+@@ -1321,6 +1321,8 @@ void brcmf_detach(struct device *dev)
+
+ brcmf_bus_change_state(bus_if, BRCMF_BUS_DOWN);
+
++ brcmf_proto_detach_pre_delif(drvr);
++
+ /* make sure primary interface removed last */
+ for (i = BRCMF_MAX_IFS-1; i > -1; i--)
+ brcmf_remove_interface(drvr->iflist[i], false);
+@@ -1330,7 +1332,7 @@ void brcmf_detach(struct device *dev)
+
+ brcmf_bus_stop(drvr->bus_if);
+
+- brcmf_proto_detach(drvr);
++ brcmf_proto_detach_post_delif(drvr);
+
+ bus_if->drvr = NULL;
+ wiphy_free(drvr->wiphy);
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c
+index d48b8b2d946f..c22c49ae552e 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c
+@@ -2443,17 +2443,25 @@ struct brcmf_fws_info *brcmf_fws_attach(struct brcmf_pub *drvr)
+ return fws;
+
+ fail:
+- brcmf_fws_detach(fws);
++ brcmf_fws_detach_pre_delif(fws);
++ brcmf_fws_detach_post_delif(fws);
+ return ERR_PTR(rc);
+ }
+
+-void brcmf_fws_detach(struct brcmf_fws_info *fws)
++void brcmf_fws_detach_pre_delif(struct brcmf_fws_info *fws)
+ {
+ if (!fws)
+ return;
+-
+- if (fws->fws_wq)
++ if (fws->fws_wq) {
+ destroy_workqueue(fws->fws_wq);
++ fws->fws_wq = NULL;
++ }
++}
++
++void brcmf_fws_detach_post_delif(struct brcmf_fws_info *fws)
++{
++ if (!fws)
++ return;
+
+ /* cleanup */
+ brcmf_fws_lock(fws);
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h
+index 4e6835766d5d..749c06dcdc17 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h
+@@ -19,7 +19,8 @@
+ #define FWSIGNAL_H_
+
+ struct brcmf_fws_info *brcmf_fws_attach(struct brcmf_pub *drvr);
+-void brcmf_fws_detach(struct brcmf_fws_info *fws);
++void brcmf_fws_detach_pre_delif(struct brcmf_fws_info *fws);
++void brcmf_fws_detach_post_delif(struct brcmf_fws_info *fws);
+ void brcmf_fws_debugfs_create(struct brcmf_pub *drvr);
+ bool brcmf_fws_queue_skbs(struct brcmf_fws_info *fws);
+ bool brcmf_fws_fc_active(struct brcmf_fws_info *fws);
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c
+index 024c643052bc..c7964ccdda69 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c
+@@ -67,16 +67,22 @@ int brcmf_proto_attach(struct brcmf_pub *drvr)
+ return -ENOMEM;
+ }
+
+-void brcmf_proto_detach(struct brcmf_pub *drvr)
++void brcmf_proto_detach_post_delif(struct brcmf_pub *drvr)
+ {
+ brcmf_dbg(TRACE, "Enter\n");
+
+ if (drvr->proto) {
+ if (drvr->bus_if->proto_type == BRCMF_PROTO_BCDC)
+- brcmf_proto_bcdc_detach(drvr);
++ brcmf_proto_bcdc_detach_post_delif(drvr);
+ else if (drvr->bus_if->proto_type == BRCMF_PROTO_MSGBUF)
+ brcmf_proto_msgbuf_detach(drvr);
+ kfree(drvr->proto);
+ drvr->proto = NULL;
+ }
+ }
++
++void brcmf_proto_detach_pre_delif(struct brcmf_pub *drvr)
++{
++ if (drvr->proto && drvr->bus_if->proto_type == BRCMF_PROTO_BCDC)
++ brcmf_proto_bcdc_detach_pre_delif(drvr);
++}
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h
+index d3c3b9a815ad..72355aea9028 100644
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h
+@@ -54,7 +54,8 @@ struct brcmf_proto {
+
+
+ int brcmf_proto_attach(struct brcmf_pub *drvr);
+-void brcmf_proto_detach(struct brcmf_pub *drvr);
++void brcmf_proto_detach_pre_delif(struct brcmf_pub *drvr);
++void brcmf_proto_detach_post_delif(struct brcmf_pub *drvr);
+
+ static inline int brcmf_proto_hdrpull(struct brcmf_pub *drvr, bool do_fws,
+ struct sk_buff *skb,
+--
+2.16.4
+
diff --git a/patches.drivers/cxgb4-Enable-hash-filter-with-offload.patch b/patches.drivers/cxgb4-Enable-hash-filter-with-offload.patch
new file mode 100644
index 0000000000..494f349348
--- /dev/null
+++ b/patches.drivers/cxgb4-Enable-hash-filter-with-offload.patch
@@ -0,0 +1,299 @@
+From: Vishal Kulkarni <vishal@chelsio.com>
+Date: Wed, 22 May 2019 21:46:12 +0530
+Subject: cxgb4: Enable hash filter with offload
+Patch-mainline: Queued in subsystem maintainer repository
+Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
+Git-commit: 74dd5aa1ed94a8099a57bb7f91300668d0600ade
+References: bsc#1136345 jsc#SLE-4681
+
+Hash (exact-match) filters used for offloading flows share the
+same active region resources on the chip with upper layer drivers,
+like iw_cxgb4, chcr, etc. Currently, only either Hash filters
+or ULDs can use the active region resources, but not both. Hence,
+use the new firmware configuration parameters (when available)
+to allow both the Hash filters and ULDs to share the
+active region simultaneously.
+
+Signed-off-by: Vishal Kulkarni <vishal@chelsio.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c | 38 +++++++++++-----
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.h | 2
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 52 ++++++++++++++++++----
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h | 1
+ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 32 +++++++++++++
+ drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 4 +
+ drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 2
+ 8 files changed, 110 insertions(+), 22 deletions(-)
+
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+@@ -600,6 +600,7 @@ struct port_info {
+ u8 vin;
+ u8 vivld;
+ u8 smt_idx;
++ u8 rx_cchan;
+ };
+
+ struct dentry;
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
+@@ -1041,7 +1041,7 @@ static void mk_act_open_req6(struct filt
+ RSS_QUEUE_V(f->fs.iq) |
+ TX_QUEUE_V(f->fs.nat_mode) |
+ T5_OPT_2_VALID_F |
+- RX_CHANNEL_F |
++ RX_CHANNEL_V(cxgb4_port_e2cchan(f->dev)) |
+ CONG_CNTRL_V((f->fs.action == FILTER_DROP) |
+ (f->fs.dirsteer << 1)) |
+ PACE_V((f->fs.maskhash) |
+@@ -1081,7 +1081,7 @@ static void mk_act_open_req(struct filte
+ RSS_QUEUE_V(f->fs.iq) |
+ TX_QUEUE_V(f->fs.nat_mode) |
+ T5_OPT_2_VALID_F |
+- RX_CHANNEL_F |
++ RX_CHANNEL_V(cxgb4_port_e2cchan(f->dev)) |
+ CONG_CNTRL_V((f->fs.action == FILTER_DROP) |
+ (f->fs.dirsteer << 1)) |
+ PACE_V((f->fs.maskhash) |
+@@ -1833,24 +1833,38 @@ void filter_rpl(struct adapter *adap, co
+ }
+ }
+
+-int init_hash_filter(struct adapter *adap)
++void init_hash_filter(struct adapter *adap)
+ {
++ u32 reg;
++
+ /* On T6, verify the necessary register configs and warn the user in
+ * case of improper config
+ */
+ if (is_t6(adap->params.chip)) {
+- if (TCAM_ACTV_HIT_G(t4_read_reg(adap, LE_DB_RSP_CODE_0_A)) != 4)
+- goto err;
++ if (is_offload(adap)) {
++ if (!(t4_read_reg(adap, TP_GLOBAL_CONFIG_A)
++ & ACTIVEFILTERCOUNTS_F)) {
++ dev_err(adap->pdev_dev, "Invalid hash filter + ofld config\n");
++ return;
++ }
++ } else {
++ reg = t4_read_reg(adap, LE_DB_RSP_CODE_0_A);
++ if (TCAM_ACTV_HIT_G(reg) != 4) {
++ dev_err(adap->pdev_dev, "Invalid hash filter config\n");
++ return;
++ }
++
++ reg = t4_read_reg(adap, LE_DB_RSP_CODE_1_A);
++ if (HASH_ACTV_HIT_G(reg) != 4) {
++ dev_err(adap->pdev_dev, "Invalid hash filter config\n");
++ return;
++ }
++ }
+
+- if (HASH_ACTV_HIT_G(t4_read_reg(adap, LE_DB_RSP_CODE_1_A)) != 4)
+- goto err;
+ } else {
+ dev_err(adap->pdev_dev, "Hash filter supported only on T6\n");
+- return -EINVAL;
++ return;
+ }
++
+ adap->params.hash_filter = 1;
+- return 0;
+-err:
+- dev_warn(adap->pdev_dev, "Invalid hash filter config!\n");
+- return -EINVAL;
+ }
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.h
+@@ -50,7 +50,7 @@ int delete_filter(struct adapter *adapte
+
+ int writable_filter(struct filter_entry *f);
+ void clear_all_filters(struct adapter *adapter);
+-int init_hash_filter(struct adapter *adap);
++void init_hash_filter(struct adapter *adap);
+ bool is_filter_exact_match(struct adapter *adap,
+ struct ch_filter_specification *fs);
+ #endif /* __CXGB4_FILTER_H */
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+@@ -1647,6 +1647,18 @@ unsigned int cxgb4_port_chan(const struc
+ }
+ EXPORT_SYMBOL(cxgb4_port_chan);
+
++/**
++ * cxgb4_port_e2cchan - get the HW c-channel of a port
++ * @dev: the net device for the port
++ *
++ * Return the HW RX c-channel of the given port.
++ */
++unsigned int cxgb4_port_e2cchan(const struct net_device *dev)
++{
++ return netdev2pinfo(dev)->rx_cchan;
++}
++EXPORT_SYMBOL(cxgb4_port_e2cchan);
++
+ unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo)
+ {
+ struct adapter *adap = netdev2adap(dev);
+@@ -3913,14 +3925,14 @@ static int adap_init0_phy(struct adapter
+ */
+ static int adap_init0_config(struct adapter *adapter, int reset)
+ {
++ char *fw_config_file, fw_config_file_path[256];
++ u32 finiver, finicsum, cfcsum, param, val;
+ struct fw_caps_config_cmd caps_cmd;
+- const struct firmware *cf;
+ unsigned long mtype = 0, maddr = 0;
+- u32 finiver, finicsum, cfcsum;
+- int ret;
+- int config_issued = 0;
+- char *fw_config_file, fw_config_file_path[256];
++ const struct firmware *cf;
+ char *config_name = NULL;
++ int config_issued = 0;
++ int ret;
+
+ /*
+ * Reset device if necessary.
+@@ -4028,6 +4040,24 @@ static int adap_init0_config(struct adap
+ goto bye;
+ }
+
++ val = 0;
++
++ /* Ofld + Hash filter is supported. Older fw will fail this request and
++ * it is fine.
++ */
++ param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
++ FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_HASHFILTER_WITH_OFLD));
++ ret = t4_set_params(adapter, adapter->mbox, adapter->pf, 0,
++ 1, &param, &val);
++
++ /* FW doesn't know about Hash filter + ofld support,
++ * it's not a problem, don't return an error.
++ */
++ if (ret < 0) {
++ dev_warn(adapter->pdev_dev,
++ "Hash filter with ofld is not supported by FW\n");
++ }
++
+ /*
+ * Issue a Capability Configuration command to the firmware to get it
+ * to parse the Configuration File. We don't use t4_fw_config_file()
+@@ -4588,6 +4618,13 @@ static int adap_init0(struct adapter *ad
+ if (ret < 0)
+ goto bye;
+
++ /* hash filter has some mandatory register settings to be tested and for
++ * that it needs to test whether offload is enabled or not, hence
++ * checking and setting it here.
++ */
++ if (caps_cmd.ofldcaps)
++ adap->params.offload = 1;
++
+ if (caps_cmd.ofldcaps ||
+ (caps_cmd.niccaps & htons(FW_CAPS_CONFIG_NIC_HASHFILTER))) {
+ /* query offload-related parameters */
+@@ -4627,11 +4664,8 @@ static int adap_init0(struct adapter *ad
+ adap->params.ofldq_wr_cred = val[5];
+
+ if (caps_cmd.niccaps & htons(FW_CAPS_CONFIG_NIC_HASHFILTER)) {
+- ret = init_hash_filter(adap);
+- if (ret < 0)
+- goto bye;
++ init_hash_filter(adap);
+ } else {
+- adap->params.offload = 1;
+ adap->num_ofld_uld += 1;
+ }
+ }
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
+@@ -393,6 +393,7 @@ int cxgb4_immdata_send(struct net_device
+ int cxgb4_crypto_send(struct net_device *dev, struct sk_buff *skb);
+ unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
+ unsigned int cxgb4_port_chan(const struct net_device *dev);
++unsigned int cxgb4_port_e2cchan(const struct net_device *dev);
+ unsigned int cxgb4_port_viid(const struct net_device *dev);
+ unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
+ unsigned int cxgb4_port_idx(const struct net_device *dev);
+--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
++++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+@@ -6209,6 +6209,37 @@ unsigned int t4_get_mps_bg_map(struct ad
+ }
+
+ /**
++ * t4_get_tp_e2c_map - return the E2C channel map associated with a port
++ * @adapter: the adapter
++ * @pidx: the port index
++ */
++unsigned int t4_get_tp_e2c_map(struct adapter *adapter, int pidx)
++{
++ unsigned int nports;
++ u32 param, val = 0;
++ int ret;
++
++ nports = 1 << NUMPORTS_G(t4_read_reg(adapter, MPS_CMN_CTL_A));
++ if (pidx >= nports) {
++ CH_WARN(adapter, "TP E2C Channel Port Index %d >= Nports %d\n",
++ pidx, nports);
++ return 0;
++ }
++
++ /* FW version >= 1.16.44.0 can determine E2C channel map using
++ * FW_PARAMS_PARAM_DEV_TPCHMAP API.
++ */
++ param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
++ FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPCHMAP));
++ ret = t4_query_params_ns(adapter, adapter->mbox, adapter->pf,
++ 0, 1, &param, &val);
++ if (!ret)
++ return (val >> (8 * pidx)) & 0xff;
++
++ return 0;
++}
++
++/**
+ * t4_get_tp_ch_map - return TP ingress channels associated with a port
+ * @adapter: the adapter
+ * @pidx: the port index
+@@ -9594,6 +9625,7 @@ int t4_init_portinfo(struct port_info *p
+ pi->tx_chan = port;
+ pi->lport = port;
+ pi->rss_size = rss_size;
++ pi->rx_cchan = t4_get_tp_e2c_map(pi->adapter, port);
+
+ /* If fw supports returning the VIN as part of FW_VI_CMD,
+ * save the returned values.
+--- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
+@@ -1334,6 +1334,10 @@
+ #define TP_OUT_CONFIG_A 0x7d04
+ #define TP_GLOBAL_CONFIG_A 0x7d08
+
++#define ACTIVEFILTERCOUNTS_S 22
++#define ACTIVEFILTERCOUNTS_V(x) ((x) << ACTIVEFILTERCOUNTS_S)
++#define ACTIVEFILTERCOUNTS_F ACTIVEFILTERCOUNTS_V(1U)
++
+ #define TP_CMM_TCB_BASE_A 0x7d10
+ #define TP_CMM_MM_BASE_A 0x7d14
+ #define TP_CMM_TIMER_BASE_A 0x7d18
+--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+@@ -1250,10 +1250,12 @@ enum fw_params_param_dev {
+ FW_PARAMS_PARAM_DEV_RI_FR_NSMR_TPTE_WR = 0x1C,
+ FW_PARAMS_PARAM_DEV_FILTER2_WR = 0x1D,
+ FW_PARAMS_PARAM_DEV_MPSBGMAP = 0x1E,
++ FW_PARAMS_PARAM_DEV_TPCHMAP = 0x1F,
+ FW_PARAMS_PARAM_DEV_HMA_SIZE = 0x20,
+ FW_PARAMS_PARAM_DEV_RDMA_WRITE_WITH_IMM = 0x21,
+ FW_PARAMS_PARAM_DEV_RI_WRITE_CMPL_WR = 0x24,
+ FW_PARAMS_PARAM_DEV_OPAQUE_VIID_SMT_EXTN = 0x27,
++ FW_PARAMS_PARAM_DEV_HASHFILTER_WITH_OFLD = 0x28,
+ FW_PARAMS_PARAM_DEV_DBQ_TIMER = 0x29,
+ FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK = 0x2A,
+ };
diff --git a/patches.drivers/cxgb4-use-firmware-API-for-validating-filter-spec.patch b/patches.drivers/cxgb4-use-firmware-API-for-validating-filter-spec.patch
new file mode 100644
index 0000000000..24f0141d34
--- /dev/null
+++ b/patches.drivers/cxgb4-use-firmware-API-for-validating-filter-spec.patch
@@ -0,0 +1,159 @@
+From: Raju Rangoju <rajur@chelsio.com>
+Date: Thu, 23 May 2019 19:21:21 +0530
+Subject: cxgb4: use firmware API for validating filter spec
+Patch-mainline: Queued in subsystem maintainer repository
+Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
+Git-commit: dcf10ec772ade4e9ba76f31c07dc1927b58eb4b4
+References: bsc#1136345 jsc#SLE-4681
+
+Adds support for validating hardware filter spec configured in firmware
+before offloading exact match flows.
+
+Use the new fw api FW_PARAM_DEV_FILTER_MODE_MASK to read the filter mode
+and mask from firmware. If the api isn't supported, then fall-back to
+older way of reading just the mode from indirect register.
+
+Signed-off-by: Raju Rangoju <rajur@chelsio.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1
+ drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c | 3 -
+ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 47 +++++++++++++++++++---
+ drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 23 ++++++++++
+ 4 files changed, 68 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+@@ -280,6 +280,7 @@ struct tp_params {
+ unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */
+
+ u32 vlan_pri_map; /* cached TP_VLAN_PRI_MAP */
++ u32 filter_mask;
+ u32 ingress_config; /* cached TP_INGRESS_CONFIG */
+
+ /* cached TP_OUT_CONFIG compressed error vector
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
+@@ -248,8 +248,9 @@ static int validate_filter(struct net_de
+ u32 fconf, iconf;
+
+ /* Check for unconfigured fields being used. */
+- fconf = adapter->params.tp.vlan_pri_map;
+ iconf = adapter->params.tp.ingress_config;
++ fconf = fs->hash ? adapter->params.tp.filter_mask :
++ adapter->params.tp.vlan_pri_map;
+
+ if (unsupported(fconf, FCOE_F, fs->val.fcoe, fs->mask.fcoe) ||
+ unsupported(fconf, PORT_F, fs->val.iport, fs->mask.iport) ||
+--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
++++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+@@ -9399,8 +9399,9 @@ int t4_init_sge_params(struct adapter *a
+ */
+ int t4_init_tp_params(struct adapter *adap, bool sleep_ok)
+ {
+- int chan;
+- u32 v;
++ u32 param, val, v;
++ int chan, ret;
++
+
+ v = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
+ adap->params.tp.tre = TIMERRESOLUTION_G(v);
+@@ -9410,11 +9411,47 @@ int t4_init_tp_params(struct adapter *ad
+ for (chan = 0; chan < NCHAN; chan++)
+ adap->params.tp.tx_modq[chan] = chan;
+
+- /* Cache the adapter's Compressed Filter Mode and global Incress
++ /* Cache the adapter's Compressed Filter Mode/Mask and global Ingress
+ * Configuration.
+ */
+- t4_tp_pio_read(adap, &adap->params.tp.vlan_pri_map, 1,
+- TP_VLAN_PRI_MAP_A, sleep_ok);
++ param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
++ FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FILTER) |
++ FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_FILTER_MODE_MASK));
++
++ /* Read current value */
++ ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1,
++ &param, &val);
++ if (ret == 0) {
++ dev_info(adap->pdev_dev,
++ "Current filter mode/mask 0x%x:0x%x\n",
++ FW_PARAMS_PARAM_FILTER_MODE_G(val),
++ FW_PARAMS_PARAM_FILTER_MASK_G(val));
++ adap->params.tp.vlan_pri_map =
++ FW_PARAMS_PARAM_FILTER_MODE_G(val);
++ adap->params.tp.filter_mask =
++ FW_PARAMS_PARAM_FILTER_MASK_G(val);
++ } else {
++ dev_info(adap->pdev_dev,
++ "Failed to read filter mode/mask via fw api, using indirect-reg-read\n");
++
++ /* Incase of older-fw (which doesn't expose the api
++ * FW_PARAM_DEV_FILTER_MODE_MASK) and newer-driver (which uses
++ * the fw api) combination, fall-back to older method of reading
++ * the filter mode from indirect-register
++ */
++ t4_tp_pio_read(adap, &adap->params.tp.vlan_pri_map, 1,
++ TP_VLAN_PRI_MAP_A, sleep_ok);
++
++ /* With the older-fw and newer-driver combination we might run
++ * into an issue when user wants to use hash filter region but
++ * the filter_mask is zero, in this case filter_mask validation
++ * is tough. To avoid that we set the filter_mask same as filter
++ * mode, which will behave exactly as the older way of ignoring
++ * the filter mask validation.
++ */
++ adap->params.tp.filter_mask = adap->params.tp.vlan_pri_map;
++ }
++
+ t4_tp_pio_read(adap, &adap->params.tp.ingress_config, 1,
+ TP_INGRESS_CONFIG_A, sleep_ok);
+
+--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
++++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+@@ -1221,6 +1221,23 @@ enum fw_params_mnem {
+ /*
+ * device parameters
+ */
++
++#define FW_PARAMS_PARAM_FILTER_MODE_S 16
++#define FW_PARAMS_PARAM_FILTER_MODE_M 0xffff
++#define FW_PARAMS_PARAM_FILTER_MODE_V(x) \
++ ((x) << FW_PARAMS_PARAM_FILTER_MODE_S)
++#define FW_PARAMS_PARAM_FILTER_MODE_G(x) \
++ (((x) >> FW_PARAMS_PARAM_FILTER_MODE_S) & \
++ FW_PARAMS_PARAM_FILTER_MODE_M)
++
++#define FW_PARAMS_PARAM_FILTER_MASK_S 0
++#define FW_PARAMS_PARAM_FILTER_MASK_M 0xffff
++#define FW_PARAMS_PARAM_FILTER_MASK_V(x) \
++ ((x) << FW_PARAMS_PARAM_FILTER_MASK_S)
++#define FW_PARAMS_PARAM_FILTER_MASK_G(x) \
++ (((x) >> FW_PARAMS_PARAM_FILTER_MASK_S) & \
++ FW_PARAMS_PARAM_FILTER_MASK_M)
++
+ enum fw_params_param_dev {
+ FW_PARAMS_PARAM_DEV_CCLK = 0x00, /* chip core clock in khz */
+ FW_PARAMS_PARAM_DEV_PORTVEC = 0x01, /* the port vector */
+@@ -1258,6 +1275,7 @@ enum fw_params_param_dev {
+ FW_PARAMS_PARAM_DEV_HASHFILTER_WITH_OFLD = 0x28,
+ FW_PARAMS_PARAM_DEV_DBQ_TIMER = 0x29,
+ FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK = 0x2A,
++ FW_PARAMS_PARAM_DEV_FILTER = 0x2E,
+ };
+
+ /*
+@@ -1349,6 +1367,11 @@ enum fw_params_param_dev_diag {
+ FW_PARAM_DEV_DIAG_MAXTMPTHRESH = 0x02,
+ };
+
++enum fw_params_param_dev_filter {
++ FW_PARAM_DEV_FILTER_VNIC_MODE = 0x00,
++ FW_PARAM_DEV_FILTER_MODE_MASK = 0x01,
++};
++
+ enum fw_params_param_dev_fwcache {
+ FW_PARAM_DEV_FWCACHE_FLUSH = 0x00,
+ FW_PARAM_DEV_FWCACHE_FLUSHINV = 0x01,
diff --git a/patches.drivers/dmaengine-Replace-WARN_TAINT_ONCE-with-pr_warn_once.patch b/patches.drivers/dmaengine-Replace-WARN_TAINT_ONCE-with-pr_warn_once.patch
new file mode 100644
index 0000000000..4e0167c3db
--- /dev/null
+++ b/patches.drivers/dmaengine-Replace-WARN_TAINT_ONCE-with-pr_warn_once.patch
@@ -0,0 +1,48 @@
+From 036e9ef8becde736e693be4f4bef56d5b56fc298 Mon Sep 17 00:00:00 2001
+From: Prarit Bhargava <prarit@redhat.com>
+Date: Tue, 13 Jun 2017 12:56:34 -0400
+Subject: [PATCH] dmaengine: Replace WARN_TAINT_ONCE() with pr_warn_once()
+Git-commit: 036e9ef8becde736e693be4f4bef56d5b56fc298
+Patch-mainline: v4.13-rc1
+References: jsc#SLE-5442
+
+The WARN_TAINT_ONCE() prints out a loud stack trace on broken BIOSes.
+The systems that have this problem are several years out of support and
+no longer have BIOS updates available. The stack trace isn't necessary
+and a pr_warn_once() will do.
+
+Change WARN_TAINT_ONCE() to pr_warn_once() and taint.
+
+Signed-off-by: Prarit Bhargava <prarit@redhat.com>
+Cc: Dan Williams <dan.j.williams@intel.com>
+Cc: Vinod Koul <vinod.koul@intel.com>
+Cc: Duyck, Alexander H <alexander.h.duyck@intel.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/dca.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/dma/ioat/dca.c b/drivers/dma/ioat/dca.c
+index 0b9b6b07db9e..eab2fdda29ec 100644
+--- a/drivers/dma/ioat/dca.c
++++ b/drivers/dma/ioat/dca.c
+@@ -336,10 +336,10 @@ struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase)
+ }
+
+ if (dca3_tag_map_invalid(ioatdca->tag_map)) {
+- WARN_TAINT_ONCE(1, TAINT_FIRMWARE_WORKAROUND,
+- "%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
+- dev_driver_string(&pdev->dev),
+- dev_name(&pdev->dev));
++ add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
++ pr_warn_once("%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
++ dev_driver_string(&pdev->dev),
++ dev_name(&pdev->dev));
+ free_dca_provider(dca);
+ return NULL;
+ }
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-at_xdmac-remove-BUG_ON-macro-in-tasklet.patch b/patches.drivers/dmaengine-at_xdmac-remove-BUG_ON-macro-in-tasklet.patch
new file mode 100644
index 0000000000..8d9ddef104
--- /dev/null
+++ b/patches.drivers/dmaengine-at_xdmac-remove-BUG_ON-macro-in-tasklet.patch
@@ -0,0 +1,42 @@
+From e2c114c06da2d9ffad5b16690abf008d6696f689 Mon Sep 17 00:00:00 2001
+From: Nicolas Ferre <nicolas.ferre@microchip.com>
+Date: Wed, 3 Apr 2019 12:23:57 +0200
+Subject: [PATCH] dmaengine: at_xdmac: remove BUG_ON macro in tasklet
+Git-commit: e2c114c06da2d9ffad5b16690abf008d6696f689
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Even if this case shouldn't happen when controller is properly programmed,
+it's still better to avoid dumping a kernel Oops for this.
+As the sequence may happen only for debugging purposes, log the error and
+just finish the tasklet call.
+
+Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
+Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/at_xdmac.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
+index fe69dccfa0c0..37a269420435 100644
+--- a/drivers/dma/at_xdmac.c
++++ b/drivers/dma/at_xdmac.c
+@@ -1606,7 +1606,11 @@ static void at_xdmac_tasklet(unsigned long data)
+ struct at_xdmac_desc,
+ xfer_node);
+ dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, desc);
+- BUG_ON(!desc->active_xfer);
++ if (!desc->active_xfer) {
++ dev_err(chan2dev(&atchan->chan), "Xfer not active: exiting");
++ spin_unlock_bh(&atchan->lock);
++ return;
++ }
+
+ txd = &desc->tx_dma_desc;
+
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioat-constify-pci_device_id.patch b/patches.drivers/dmaengine-ioat-constify-pci_device_id.patch
new file mode 100644
index 0000000000..930ffe8994
--- /dev/null
+++ b/patches.drivers/dmaengine-ioat-constify-pci_device_id.patch
@@ -0,0 +1,44 @@
+From 01fa2fae5a0b0f1c7c7c4afb336fff0278161432 Mon Sep 17 00:00:00 2001
+From: Arvind Yadav <arvind.yadav.cs@gmail.com>
+Date: Mon, 17 Jul 2017 21:39:00 +0530
+Subject: [PATCH] dmaengine: ioat: constify pci_device_id.
+Git-commit: 01fa2fae5a0b0f1c7c7c4afb336fff0278161432
+Patch-mainline: v4.14-rc1
+References: jsc#SLE-5442
+
+pci_device_id are not supposed to change at runtime. All functions
+working with pci_device_id provided by <linux/pci.h> work with
+const pci_device_id. So mark the non-const structs as const.
+
+File size before:
+ text data bss dec hex filename
+ 12582 3056 16 15654 3d26 drivers/dma/ioat/init.o
+
+File size After adding 'const':
+ text data bss dec hex filename
+ 14773 865 16 15654 3d26 drivers/dma/ioat/init.o
+
+Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/init.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index ed8ed1192775..93e006c3441d 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -39,7 +39,7 @@ MODULE_VERSION(IOAT_DMA_VERSION);
+ MODULE_LICENSE("Dual BSD/GPL");
+ MODULE_AUTHOR("Intel Corporation");
+
+-static struct pci_device_id ioat_pci_tbl[] = {
++static const struct pci_device_id ioat_pci_tbl[] = {
+ /* I/OAT v3 platforms */
+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) },
+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) },
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioat-don-t-use-DMA_ERROR_CODE.patch b/patches.drivers/dmaengine-ioat-don-t-use-DMA_ERROR_CODE.patch
new file mode 100644
index 0000000000..49a53296be
--- /dev/null
+++ b/patches.drivers/dmaengine-ioat-don-t-use-DMA_ERROR_CODE.patch
@@ -0,0 +1,80 @@
+From e4734b3f5ffc42d821a316383222d71dce7d5c9e Mon Sep 17 00:00:00 2001
+From: Christoph Hellwig <hch@lst.de>
+Date: Sun, 21 May 2017 12:54:31 +0200
+Subject: [PATCH] dmaengine: ioat: don't use DMA_ERROR_CODE
+Git-commit: e4734b3f5ffc42d821a316383222d71dce7d5c9e
+Patch-mainline: v4.13-rc1
+References: jsc#SLE-5442
+
+DMA_ERROR_CODE is not a public API and will go away. Instead properly
+unwind based on the loop counter.
+
+Signed-off-by: Christoph Hellwig <hch@lst.de>
+Acked-by: Dave Jiang <dave.jiang@intel.com>
+Acked-by: Vinod Koul <vinod.koul@intel.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/init.c | 24 +++++++-----------------
+ 1 file changed, 7 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index 6ad4384b3fa8..ed8ed1192775 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -839,8 +839,6 @@ static int ioat_xor_val_self_test(struct ioatdma_device *ioat_dma)
+ goto free_resources;
+ }
+
+- for (i = 0; i < IOAT_NUM_SRC_TEST; i++)
+- dma_srcs[i] = DMA_ERROR_CODE;
+ for (i = 0; i < IOAT_NUM_SRC_TEST; i++) {
+ dma_srcs[i] = dma_map_page(dev, xor_srcs[i], 0, PAGE_SIZE,
+ DMA_TO_DEVICE);
+@@ -910,8 +908,6 @@ static int ioat_xor_val_self_test(struct ioatdma_device *ioat_dma)
+
+ xor_val_result = 1;
+
+- for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)
+- dma_srcs[i] = DMA_ERROR_CODE;
+ for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++) {
+ dma_srcs[i] = dma_map_page(dev, xor_val_srcs[i], 0, PAGE_SIZE,
+ DMA_TO_DEVICE);
+@@ -965,8 +961,6 @@ static int ioat_xor_val_self_test(struct ioatdma_device *ioat_dma)
+ op = IOAT_OP_XOR_VAL;
+
+ xor_val_result = 0;
+- for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)
+- dma_srcs[i] = DMA_ERROR_CODE;
+ for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++) {
+ dma_srcs[i] = dma_map_page(dev, xor_val_srcs[i], 0, PAGE_SIZE,
+ DMA_TO_DEVICE);
+@@ -1017,18 +1011,14 @@ static int ioat_xor_val_self_test(struct ioatdma_device *ioat_dma)
+ goto free_resources;
+ dma_unmap:
+ if (op == IOAT_OP_XOR) {
+- if (dest_dma != DMA_ERROR_CODE)
+- dma_unmap_page(dev, dest_dma, PAGE_SIZE,
+- DMA_FROM_DEVICE);
+- for (i = 0; i < IOAT_NUM_SRC_TEST; i++)
+- if (dma_srcs[i] != DMA_ERROR_CODE)
+- dma_unmap_page(dev, dma_srcs[i], PAGE_SIZE,
+- DMA_TO_DEVICE);
++ while (--i >= 0)
++ dma_unmap_page(dev, dma_srcs[i], PAGE_SIZE,
++ DMA_TO_DEVICE);
++ dma_unmap_page(dev, dest_dma, PAGE_SIZE, DMA_FROM_DEVICE);
+ } else if (op == IOAT_OP_XOR_VAL) {
+- for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)
+- if (dma_srcs[i] != DMA_ERROR_CODE)
+- dma_unmap_page(dev, dma_srcs[i], PAGE_SIZE,
+- DMA_TO_DEVICE);
++ while (--i >= 0)
++ dma_unmap_page(dev, dma_srcs[i], PAGE_SIZE,
++ DMA_TO_DEVICE);
+ }
+ free_resources:
+ dma->device_free_chan_resources(dma_chan);
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioat-fix-prototype-of-ioat_enumerate_chann.patch b/patches.drivers/dmaengine-ioat-fix-prototype-of-ioat_enumerate_chann.patch
new file mode 100644
index 0000000000..876c9167d2
--- /dev/null
+++ b/patches.drivers/dmaengine-ioat-fix-prototype-of-ioat_enumerate_chann.patch
@@ -0,0 +1,58 @@
+From f4d34aa8c887a8a2d23ef546da0efa10e3f77241 Mon Sep 17 00:00:00 2001
+From: Rami Rosen <ramirose@gmail.com>
+Date: Fri, 5 Oct 2018 00:03:10 +0300
+Subject: [PATCH] dmaengine: ioat: fix prototype of ioat_enumerate_channels
+Git-commit: f4d34aa8c887a8a2d23ef546da0efa10e3f77241
+Patch-mainline: v4.20-rc1
+References: jsc#SLE-5442
+
+Signed-off-by: Rami Rosen <ramirose@gmail.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/init.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index 21a5708985bc..0fec3c554fe3 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -129,7 +129,7 @@ static void
+ ioat_init_channel(struct ioatdma_device *ioat_dma,
+ struct ioatdma_chan *ioat_chan, int idx);
+ static void ioat_intr_quirk(struct ioatdma_device *ioat_dma);
+-static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma);
++static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma);
+ static int ioat3_dma_self_test(struct ioatdma_device *ioat_dma);
+
+ static int ioat_dca_enabled = 1;
+@@ -575,7 +575,7 @@ static void ioat_dma_remove(struct ioatdma_device *ioat_dma)
+ * ioat_enumerate_channels - find and initialize the device's channels
+ * @ioat_dma: the ioat dma device to be enumerated
+ */
+-static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
++static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
+ {
+ struct ioatdma_chan *ioat_chan;
+ struct device *dev = &ioat_dma->pdev->dev;
+@@ -594,7 +594,7 @@ static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
+ xfercap_log = readb(ioat_dma->reg_base + IOAT_XFERCAP_OFFSET);
+ xfercap_log &= 0x1f; /* bits [4:0] valid */
+ if (xfercap_log == 0)
+- return 0;
++ return;
+ dev_dbg(dev, "%s: xfercap = %d\n", __func__, 1 << xfercap_log);
+
+ for (i = 0; i < dma->chancnt; i++) {
+@@ -611,7 +611,6 @@ static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
+ }
+ }
+ dma->chancnt = i;
+- return i;
+ }
+
+ /**
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioatdma-Add-Snow-Ridge-ioatdma-device-id.patch b/patches.drivers/dmaengine-ioatdma-Add-Snow-Ridge-ioatdma-device-id.patch
new file mode 100644
index 0000000000..a0377409ca
--- /dev/null
+++ b/patches.drivers/dmaengine-ioatdma-Add-Snow-Ridge-ioatdma-device-id.patch
@@ -0,0 +1,65 @@
+From 4d75873f814055359bb6722c4e35a185d02157a8 Mon Sep 17 00:00:00 2001
+From: Dave Jiang <dave.jiang@intel.com>
+Date: Fri, 22 Feb 2019 09:59:54 -0700
+Subject: [PATCH] dmaengine: ioatdma: Add Snow Ridge ioatdma device id
+Git-commit: 4d75873f814055359bb6722c4e35a185d02157a8
+Patch-mainline: v5.1-rc1
+References: jsc#SLE-5442
+
+Add Snowridge Xeon-D ioatdma PCI device id. Also applies for Icelake
+SP Xeon. This introduces ioatdma v3.4 platform. Also bumping driver version
+to 5.0 since we are adding additional code for 3.4 support.
+
+Signed-off-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/dma.h | 2 +-
+ drivers/dma/ioat/hw.h | 2 ++
+ drivers/dma/ioat/init.c | 3 +++
+ 3 files changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
+index 1ab42ec2b7ff..aaafd0e882b5 100644
+--- a/drivers/dma/ioat/dma.h
++++ b/drivers/dma/ioat/dma.h
+@@ -27,7 +27,7 @@
+ #include "registers.h"
+ #include "hw.h"
+
+-#define IOAT_DMA_VERSION "4.00"
++#define IOAT_DMA_VERSION "5.00"
+
+ #define IOAT_DMA_DCA_ANY_CPU ~0
+
+diff --git a/drivers/dma/ioat/hw.h b/drivers/dma/ioat/hw.h
+index abcc51b343ce..3e38877cae6b 100644
+--- a/drivers/dma/ioat/hw.h
++++ b/drivers/dma/ioat/hw.h
+@@ -66,6 +66,8 @@
+
+ #define PCI_DEVICE_ID_INTEL_IOAT_SKX 0x2021
+
++#define PCI_DEVICE_ID_INTEL_IOAT_ICX 0x0b00
++
+ #define IOAT_VER_1_2 0x12 /* Version 1.2 */
+ #define IOAT_VER_2_0 0x20 /* Version 2.0 */
+ #define IOAT_VER_3_0 0x30 /* Version 3.0 */
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index 2d810dfcdc48..3161dfbca505 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -119,6 +119,9 @@ static const struct pci_device_id ioat_pci_tbl[] = {
+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE2) },
+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE3) },
+
++ /* I/OAT v3.4 platforms */
++ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_ICX) },
++
+ { 0, }
+ };
+ MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioatdma-Add-intr_coalesce-sysfs-entry.patch b/patches.drivers/dmaengine-ioatdma-Add-intr_coalesce-sysfs-entry.patch
new file mode 100644
index 0000000000..393ea09d5e
--- /dev/null
+++ b/patches.drivers/dmaengine-ioatdma-Add-intr_coalesce-sysfs-entry.patch
@@ -0,0 +1,142 @@
+From 268e2519f5b7101d707a0df32e628e9990bc0da6 Mon Sep 17 00:00:00 2001
+From: Ujjal Singh <ujjal.singh@intel.com>
+Date: Tue, 22 Aug 2017 20:31:18 -0400
+Subject: [PATCH] dmaengine: ioatdma: Add intr_coalesce sysfs entry
+Git-commit: 268e2519f5b7101d707a0df32e628e9990bc0da6
+Patch-mainline: v4.14-rc1
+References: jsc#SLE-5442
+
+We observed performance increase with DMA copy from memory
+to MMIO by changing the interrupt coalescing value to 0.
+The previous set value was projected on the C5xxx Xeon
+platform and no longer holds true. Removing hard coded
+value and providing a tune-able in sysfs in order to allow
+user to tune this on a per channel basis. By default this
+value will be set to 0.
+Example of sysfs variable importing for interrupt coalescing
+value from command line:
+echo 5> /sys/devices/pci0000:00/0000:00:04.0/dma/dma0chan0/
+quickdata/intr_coalesce
+
+Reported-by: Nithin Sujir <nsujir@tintri.com>
+Signed-off-by: Ujjal Singh <ujjal.singh@intel.com>
+Acked-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/dma.c | 10 +++++++---
+ drivers/dma/ioat/dma.h | 3 +++
+ drivers/dma/ioat/sysfs.c | 42 ++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 52 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
+index a371b07a0981..f70cc74032ea 100644
+--- a/drivers/dma/ioat/dma.c
++++ b/drivers/dma/ioat/dma.c
+@@ -644,9 +644,13 @@ static void __cleanup(struct ioatdma_chan *ioat_chan, dma_addr_t phys_complete)
+ mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
+ }
+
+- /* 5 microsecond delay per pending descriptor */
+- writew(min((5 * (active - i)), IOAT_INTRDELAY_MASK),
+- ioat_chan->ioat_dma->reg_base + IOAT_INTRDELAY_OFFSET);
++ /* microsecond delay by sysfs variable per pending descriptor */
++ if (ioat_chan->intr_coalesce != ioat_chan->prev_intr_coalesce) {
++ writew(min((ioat_chan->intr_coalesce * (active - i)),
++ IOAT_INTRDELAY_MASK),
++ ioat_chan->ioat_dma->reg_base + IOAT_INTRDELAY_OFFSET);
++ ioat_chan->prev_intr_coalesce = ioat_chan->intr_coalesce;
++ }
+ }
+
+ static void ioat_cleanup(struct ioatdma_chan *ioat_chan)
+diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
+index a9bc1a15b0d1..56200eefcf5e 100644
+--- a/drivers/dma/ioat/dma.h
++++ b/drivers/dma/ioat/dma.h
+@@ -142,11 +142,14 @@ struct ioatdma_chan {
+ spinlock_t prep_lock;
+ struct ioat_descs descs[2];
+ int desc_chunks;
++ int intr_coalesce;
++ int prev_intr_coalesce;
+ };
+
+ struct ioat_sysfs_entry {
+ struct attribute attr;
+ ssize_t (*show)(struct dma_chan *, char *);
++ ssize_t (*store)(struct dma_chan *, const char *, size_t);
+ };
+
+ /**
+diff --git a/drivers/dma/ioat/sysfs.c b/drivers/dma/ioat/sysfs.c
+index cb4a857ee21b..3ac677f29e8f 100644
+--- a/drivers/dma/ioat/sysfs.c
++++ b/drivers/dma/ioat/sysfs.c
+@@ -64,8 +64,24 @@ ioat_attr_show(struct kobject *kobj, struct attribute *attr, char *page)
+ return entry->show(&ioat_chan->dma_chan, page);
+ }
+
++static ssize_t
++ioat_attr_store(struct kobject *kobj, struct attribute *attr,
++const char *page, size_t count)
++{
++ struct ioat_sysfs_entry *entry;
++ struct ioatdma_chan *ioat_chan;
++
++ entry = container_of(attr, struct ioat_sysfs_entry, attr);
++ ioat_chan = container_of(kobj, struct ioatdma_chan, kobj);
++
++ if (!entry->store)
++ return -EIO;
++ return entry->store(&ioat_chan->dma_chan, page, count);
++}
++
+ const struct sysfs_ops ioat_sysfs_ops = {
+ .show = ioat_attr_show,
++ .store = ioat_attr_store,
+ };
+
+ void ioat_kobject_add(struct ioatdma_device *ioat_dma, struct kobj_type *type)
+@@ -121,11 +137,37 @@ static ssize_t ring_active_show(struct dma_chan *c, char *page)
+ }
+ static struct ioat_sysfs_entry ring_active_attr = __ATTR_RO(ring_active);
+
++static ssize_t intr_coalesce_show(struct dma_chan *c, char *page)
++{
++ struct ioatdma_chan *ioat_chan = to_ioat_chan(c);
++
++ return sprintf(page, "%d\n", ioat_chan->intr_coalesce);
++}
++
++static ssize_t intr_coalesce_store(struct dma_chan *c, const char *page,
++size_t count)
++{
++ int intr_coalesce = 0;
++ struct ioatdma_chan *ioat_chan = to_ioat_chan(c);
++
++ if (sscanf(page, "%du", &intr_coalesce) != -1) {
++ if ((intr_coalesce < 0) ||
++ (intr_coalesce > IOAT_INTRDELAY_MASK))
++ return -EINVAL;
++ ioat_chan->intr_coalesce = intr_coalesce;
++ }
++
++ return count;
++}
++
++static struct ioat_sysfs_entry intr_coalesce_attr = __ATTR_RW(intr_coalesce);
++
+ static struct attribute *ioat_attrs[] = {
+ &ring_size_attr.attr,
+ &ring_active_attr.attr,
+ &ioat_cap_attr.attr,
+ &ioat_version_attr.attr,
++ &intr_coalesce_attr.attr,
+ NULL,
+ };
+
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioatdma-add-descriptor-pre-fetch-support-f.patch b/patches.drivers/dmaengine-ioatdma-add-descriptor-pre-fetch-support-f.patch
new file mode 100644
index 0000000000..88dc5e6d40
--- /dev/null
+++ b/patches.drivers/dmaengine-ioatdma-add-descriptor-pre-fetch-support-f.patch
@@ -0,0 +1,108 @@
+From e0100d40906d5dbe6d09d31083c1a5aaccc947fa Mon Sep 17 00:00:00 2001
+From: Dave Jiang <dave.jiang@intel.com>
+Date: Fri, 22 Feb 2019 10:00:05 -0700
+Subject: [PATCH] dmaengine: ioatdma: add descriptor pre-fetch support for v3.4
+Git-commit: e0100d40906d5dbe6d09d31083c1a5aaccc947fa
+Patch-mainline: v5.1-rc1
+References: jsc#SLE-5442
+
+Adding support for new feature on ioatdma 3.4 hardware that provides
+descriptor pre-fetching in order to reduce small DMA latencies.
+
+Signed-off-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/dma.c | 12 ++++++++++++
+ drivers/dma/ioat/init.c | 8 ++++++--
+ drivers/dma/ioat/registers.h | 10 ++++++++++
+ 3 files changed, 28 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
+index 23fb2fa04000..f373a139e0c3 100644
+--- a/drivers/dma/ioat/dma.c
++++ b/drivers/dma/ioat/dma.c
+@@ -372,6 +372,7 @@ struct ioat_ring_ent **
+ ioat_alloc_ring(struct dma_chan *c, int order, gfp_t flags)
+ {
+ struct ioatdma_chan *ioat_chan = to_ioat_chan(c);
++ struct ioatdma_device *ioat_dma = ioat_chan->ioat_dma;
+ struct ioat_ring_ent **ring;
+ int total_descs = 1 << order;
+ int i, chunks;
+@@ -437,6 +438,17 @@ ioat_alloc_ring(struct dma_chan *c, int order, gfp_t flags)
+ }
+ ring[i]->hw->next = ring[0]->txd.phys;
+
++ /* setup descriptor pre-fetching for v3.4 */
++ if (ioat_dma->cap & IOAT_CAP_DPS) {
++ u16 drsctl = IOAT_CHAN_DRSZ_2MB | IOAT_CHAN_DRS_EN;
++
++ if (chunks == 1)
++ drsctl |= IOAT_CHAN_DRS_AUTOWRAP;
++
++ writew(drsctl, ioat_chan->reg_base + IOAT_CHAN_DRSCTL_OFFSET);
++
++ }
++
+ return ring;
+ }
+
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index 58dd1bfd3edd..020bcdecb3fb 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -138,10 +138,10 @@ static int ioat3_dma_self_test(struct ioatdma_device *ioat_dma);
+ static int ioat_dca_enabled = 1;
+ module_param(ioat_dca_enabled, int, 0644);
+ MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
+-int ioat_pending_level = 4;
++int ioat_pending_level = 7;
+ module_param(ioat_pending_level, int, 0644);
+ MODULE_PARM_DESC(ioat_pending_level,
+- "high-water mark for pushing ioat descriptors (default: 4)");
++ "high-water mark for pushing ioat descriptors (default: 7)");
+ static char ioat_interrupt_style[32] = "msix";
+ module_param_string(ioat_interrupt_style, ioat_interrupt_style,
+ sizeof(ioat_interrupt_style), 0644);
+@@ -1188,6 +1188,10 @@ static int ioat3_dma_probe(struct ioatdma_device *ioat_dma, int dca)
+ if (err)
+ return err;
+
++ if (ioat_dma->cap & IOAT_CAP_DPS)
++ writeb(ioat_pending_level + 1,
++ ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET);
++
+ return 0;
+ }
+
+diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h
+index 2f3bbc88ff2a..2b517d6db5fd 100644
+--- a/drivers/dma/ioat/registers.h
++++ b/drivers/dma/ioat/registers.h
+@@ -84,6 +84,9 @@
+ #define IOAT_CAP_PQ 0x00000200
+ #define IOAT_CAP_DWBES 0x00002000
+ #define IOAT_CAP_RAID16SS 0x00020000
++#define IOAT_CAP_DPS 0x00800000
++
++#define IOAT_PREFETCH_LIMIT_OFFSET 0x4C /* CHWPREFLMT */
+
+ #define IOAT_CHANNEL_MMIO_SIZE 0x80 /* Each Channel MMIO space is this size */
+
+@@ -243,4 +246,11 @@
+
+ #define IOAT_CHANERR_MASK_OFFSET 0x2C /* 32-bit Channel Error Register */
+
++#define IOAT_CHAN_DRSCTL_OFFSET 0xB6
++#define IOAT_CHAN_DRSZ_4KB 0x0000
++#define IOAT_CHAN_DRSZ_8KB 0x0001
++#define IOAT_CHAN_DRSZ_2MB 0x0009
++#define IOAT_CHAN_DRS_EN 0x0100
++#define IOAT_CHAN_DRS_AUTOWRAP 0x0200
++
+ #endif /* _IOAT_REGISTERS_H_ */
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioatdma-disable-DCA-enabling-on-IOATDMA-v3.patch b/patches.drivers/dmaengine-ioatdma-disable-DCA-enabling-on-IOATDMA-v3.patch
new file mode 100644
index 0000000000..0c0250ae01
--- /dev/null
+++ b/patches.drivers/dmaengine-ioatdma-disable-DCA-enabling-on-IOATDMA-v3.patch
@@ -0,0 +1,47 @@
+From 11e31e281bd8f482a9277268f7b0d9c213584271 Mon Sep 17 00:00:00 2001
+From: Dave Jiang <dave.jiang@intel.com>
+Date: Fri, 22 Feb 2019 09:59:59 -0700
+Subject: [PATCH] dmaengine: ioatdma: disable DCA enabling on IOATDMA v3.4
+Git-commit: 11e31e281bd8f482a9277268f7b0d9c213584271
+Patch-mainline: v5.1-rc1
+References: jsc#SLE-5442
+
+IOATDMA v3.4 does not support DCA. Disable
+
+Signed-off-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/hw.h | 1 +
+ drivers/dma/ioat/init.c | 2 ++
+ 2 files changed, 3 insertions(+)
+
+diff --git a/drivers/dma/ioat/hw.h b/drivers/dma/ioat/hw.h
+index 3e38877cae6b..781c94de8e81 100644
+--- a/drivers/dma/ioat/hw.h
++++ b/drivers/dma/ioat/hw.h
+@@ -73,6 +73,7 @@
+ #define IOAT_VER_3_0 0x30 /* Version 3.0 */
+ #define IOAT_VER_3_2 0x32 /* Version 3.2 */
+ #define IOAT_VER_3_3 0x33 /* Version 3.3 */
++#define IOAT_VER_3_4 0x34 /* Version 3.4 */
+
+
+ int system_has_dca_enabled(struct pci_dev *pdev);
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index 3161dfbca505..58dd1bfd3edd 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -1353,6 +1353,8 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+ pci_set_drvdata(pdev, device);
+
+ device->version = readb(device->reg_base + IOAT_VER_OFFSET);
++ if (device->version >= IOAT_VER_3_4)
++ ioat_dca_enabled = 0;
+ if (device->version >= IOAT_VER_3_0) {
+ if (is_skx_ioat(pdev))
+ device->version = IOAT_VER_3_2;
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioatdma-set-the-completion-address-registe.patch b/patches.drivers/dmaengine-ioatdma-set-the-completion-address-registe.patch
new file mode 100644
index 0000000000..1c90490519
--- /dev/null
+++ b/patches.drivers/dmaengine-ioatdma-set-the-completion-address-registe.patch
@@ -0,0 +1,40 @@
+From 4cb0e60112168594da2ac8a7752b0250c4387733 Mon Sep 17 00:00:00 2001
+From: Dave Jiang <dave.jiang@intel.com>
+Date: Mon, 11 Jun 2018 12:49:03 -0700
+Subject: [PATCH] dmaengine: ioatdma: set the completion address register after channel reset
+Git-commit: 4cb0e60112168594da2ac8a7752b0250c4387733
+Patch-mainline: v4.19-rc1
+References: jsc#SLE-5442
+
+It seems that starting with Skylake Xeon, channel reset clears the
+completion address register. Make sure the completion address register is
+set again after reset.
+
+Signed-off-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/dma.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
+index 8b5b23a8ace9..23fb2fa04000 100644
+--- a/drivers/dma/ioat/dma.c
++++ b/drivers/dma/ioat/dma.c
+@@ -688,6 +688,12 @@ static void ioat_restart_channel(struct ioatdma_chan *ioat_chan)
+ {
+ u64 phys_complete;
+
++ /* set the completion address register again */
++ writel(lower_32_bits(ioat_chan->completion_dma),
++ ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
++ writel(upper_32_bits(ioat_chan->completion_dma),
++ ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
++
+ ioat_quiesce(ioat_chan, 0);
+ if (ioat_cleanup_preamble(ioat_chan, &phys_complete))
+ __cleanup(ioat_chan, phys_complete);
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-ioatdma-support-latency-tolerance-report-L.patch b/patches.drivers/dmaengine-ioatdma-support-latency-tolerance-report-L.patch
new file mode 100644
index 0000000000..f4ded1ce78
--- /dev/null
+++ b/patches.drivers/dmaengine-ioatdma-support-latency-tolerance-report-L.patch
@@ -0,0 +1,93 @@
+From 528314b503f855b268ae7861ea4e206fbbfb8356 Mon Sep 17 00:00:00 2001
+From: Dave Jiang <dave.jiang@intel.com>
+Date: Fri, 22 Feb 2019 10:00:10 -0700
+Subject: [PATCH] dmaengine: ioatdma: support latency tolerance report (LTR) for v3.4
+Git-commit: 528314b503f855b268ae7861ea4e206fbbfb8356
+Patch-mainline: v5.1-rc1
+References: jsc#SLE-5442
+
+IOATDMA 3.4 supports PCIe LTR mechanism. The registers are non-standard
+PCIe LTR support. This needs to be setup in order to not suffer performance
+impact and provide proper power management. The channel is set to active
+when it is allocated, and to passive when it's freed.
+
+Signed-off-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/init.c | 27 +++++++++++++++++++++++++++
+ drivers/dma/ioat/registers.h | 14 ++++++++++++++
+ 2 files changed, 41 insertions(+)
+
+diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
+index 020bcdecb3fb..d41dc9a9ff68 100644
+--- a/drivers/dma/ioat/init.c
++++ b/drivers/dma/ioat/init.c
+@@ -638,6 +638,11 @@ static void ioat_free_chan_resources(struct dma_chan *c)
+ ioat_stop(ioat_chan);
+ ioat_reset_hw(ioat_chan);
+
++ /* Put LTR to idle */
++ if (ioat_dma->version >= IOAT_VER_3_4)
++ writeb(IOAT_CHAN_LTR_SWSEL_IDLE,
++ ioat_chan->reg_base + IOAT_CHAN_LTR_SWSEL_OFFSET);
++
+ spin_lock_bh(&ioat_chan->cleanup_lock);
+ spin_lock_bh(&ioat_chan->prep_lock);
+ descs = ioat_ring_space(ioat_chan);
+@@ -727,6 +732,28 @@ static int ioat_alloc_chan_resources(struct dma_chan *c)
+ spin_unlock_bh(&ioat_chan->prep_lock);
+ spin_unlock_bh(&ioat_chan->cleanup_lock);
+
++ /* Setting up LTR values for 3.4 or later */
++ if (ioat_chan->ioat_dma->version >= IOAT_VER_3_4) {
++ u32 lat_val;
++
++ lat_val = IOAT_CHAN_LTR_ACTIVE_SNVAL |
++ IOAT_CHAN_LTR_ACTIVE_SNLATSCALE |
++ IOAT_CHAN_LTR_ACTIVE_SNREQMNT;
++ writel(lat_val, ioat_chan->reg_base +
++ IOAT_CHAN_LTR_ACTIVE_OFFSET);
++
++ lat_val = IOAT_CHAN_LTR_IDLE_SNVAL |
++ IOAT_CHAN_LTR_IDLE_SNLATSCALE |
++ IOAT_CHAN_LTR_IDLE_SNREQMNT;
++ writel(lat_val, ioat_chan->reg_base +
++ IOAT_CHAN_LTR_IDLE_OFFSET);
++
++ /* Select to active */
++ writeb(IOAT_CHAN_LTR_SWSEL_ACTIVE,
++ ioat_chan->reg_base +
++ IOAT_CHAN_LTR_SWSEL_OFFSET);
++ }
++
+ ioat_start_null_desc(ioat_chan);
+
+ /* check that we got off the ground */
+diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h
+index 2b517d6db5fd..99c1c24d465d 100644
+--- a/drivers/dma/ioat/registers.h
++++ b/drivers/dma/ioat/registers.h
+@@ -253,4 +253,18 @@
+ #define IOAT_CHAN_DRS_EN 0x0100
+ #define IOAT_CHAN_DRS_AUTOWRAP 0x0200
+
++#define IOAT_CHAN_LTR_SWSEL_OFFSET 0xBC
++#define IOAT_CHAN_LTR_SWSEL_ACTIVE 0x0
++#define IOAT_CHAN_LTR_SWSEL_IDLE 0x1
++
++#define IOAT_CHAN_LTR_ACTIVE_OFFSET 0xC0
++#define IOAT_CHAN_LTR_ACTIVE_SNVAL 0x0000 /* 0 us */
++#define IOAT_CHAN_LTR_ACTIVE_SNLATSCALE 0x0800 /* 1us scale */
++#define IOAT_CHAN_LTR_ACTIVE_SNREQMNT 0x8000 /* snoop req enable */
++
++#define IOAT_CHAN_LTR_IDLE_OFFSET 0xC4
++#define IOAT_CHAN_LTR_IDLE_SNVAL 0x0258 /* 600 us */
++#define IOAT_CHAN_LTR_IDLE_SNLATSCALE 0x0800 /* 1us scale */
++#define IOAT_CHAN_LTR_IDLE_SNREQMNT 0x8000 /* snoop req enable */
++
+ #endif /* _IOAT_REGISTERS_H_ */
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-pl330-_stop-clear-interrupt-status.patch b/patches.drivers/dmaengine-pl330-_stop-clear-interrupt-status.patch
new file mode 100644
index 0000000000..ccb86e66a7
--- /dev/null
+++ b/patches.drivers/dmaengine-pl330-_stop-clear-interrupt-status.patch
@@ -0,0 +1,94 @@
+From 2da254cc7908105a60a6bb219d18e8dced03dcb9 Mon Sep 17 00:00:00 2001
+From: Sugar Zhang <sugar.zhang@rock-chips.com>
+Date: Wed, 3 Apr 2019 19:06:22 +0800
+Subject: [PATCH] dmaengine: pl330: _stop: clear interrupt status
+Git-commit: 2da254cc7908105a60a6bb219d18e8dced03dcb9
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+This patch kill instructs the DMAC to immediately terminate
+execution of a thread. and then clear the interrupt status,
+at last, stop generating interrupts for DMA_SEV. to guarantee
+the next dma start is clean. otherwise, one interrupt maybe leave
+to next start and make some mistake.
+
+we can reporduce the problem as follows:
+
+Dmasev: modify the event-interrupt resource, and if the INTEN sets
+function as interrupt, the DMAC will set irq<event_num> HIGH to
+generate interrupt. write INTCLR to clear interrupt.
+
+ DMA EXECUTING INSTRUCTS DMA TERMINATE
+ | |
+ | |
+ ... _stop
+ | |
+ | spin_lock_irqsave
+ DMASEV |
+ | |
+ | mask INTEN
+ | |
+ | DMAKILL
+ | |
+ | spin_unlock_irqrestore
+
+in above case, a interrupt was left, and if we unmask INTEN, the DMAC
+will set irq<event_num> HIGH to generate interrupt.
+
+to fix this, do as follows:
+
+ DMA EXECUTING INSTRUCTS DMA TERMINATE
+ | |
+ | |
+ ... _stop
+ | |
+ | spin_lock_irqsave
+ DMASEV |
+ | |
+ | DMAKILL
+ | |
+ | clear INTCLR
+ | mask INTEN
+ | |
+ | spin_unlock_irqrestore
+
+Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/pl330.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
+index c72f6fd79c43..6e6837214210 100644
+--- a/drivers/dma/pl330.c
++++ b/drivers/dma/pl330.c
+@@ -967,6 +967,7 @@ static void _stop(struct pl330_thread *thrd)
+ {
+ void __iomem *regs = thrd->dmac->base;
+ u8 insn[6] = {0, 0, 0, 0, 0, 0};
++ u32 inten = readl(regs + INTEN);
+
+ if (_state(thrd) == PL330_STATE_FAULT_COMPLETING)
+ UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
+@@ -979,10 +980,13 @@ static void _stop(struct pl330_thread *thrd)
+
+ _emit_KILL(0, insn);
+
+- /* Stop generating interrupts for SEV */
+- writel(readl(regs + INTEN) & ~(1 << thrd->ev), regs + INTEN);
+-
+ _execute_DBGINSN(thrd, insn, is_manager(thrd));
++
++ /* clear the event */
++ if (inten & (1 << thrd->ev))
++ writel(1 << thrd->ev, regs + INTCLR);
++ /* Stop generating interrupts for SEV */
++ writel(inten & ~(1 << thrd->ev), regs + INTEN);
+ }
+
+ /* Start doing req 'idx' of thread 'thrd' */
+--
+2.16.4
+
diff --git a/patches.drivers/dmaengine-tegra210-adma-Fix-crash-during-probe.patch b/patches.drivers/dmaengine-tegra210-adma-Fix-crash-during-probe.patch
new file mode 100644
index 0000000000..8b51b53b04
--- /dev/null
+++ b/patches.drivers/dmaengine-tegra210-adma-Fix-crash-during-probe.patch
@@ -0,0 +1,87 @@
+From b53611fb1ce9b1786bd18205473e0c1d6bfa8934 Mon Sep 17 00:00:00 2001
+From: Jon Hunter <jonathanh@nvidia.com>
+Date: Thu, 16 May 2019 16:53:52 +0100
+Subject: [PATCH] dmaengine: tegra210-adma: Fix crash during probe
+Git-commit: b53611fb1ce9b1786bd18205473e0c1d6bfa8934
+Patch-mainline: v5.2-rc4
+References: bsc#1111666
+
+Commit f33e7bb3eb92 ("dmaengine: tegra210-adma: restore channel status")
+added support to save and restore the DMA channel registers when runtime
+suspending the ADMA. This change is causing the kernel to crash when
+probing the ADMA, if the device is probed deferred when looking up the
+channel interrupts. The crash occurs because not all of the channel base
+addresses have been setup at this point and in the clean-up path of the
+probe, pm_runtime_suspend() is called invoking its callback which
+expects all the channel base addresses to be initialised.
+
+Although this could be fixed by simply checking for a NULL address, on
+further review of the driver it seems more appropriate that we only call
+pm_runtime_get_sync() after all the channel interrupts and base
+addresses have been configured. Therefore, fix this crash by moving the
+calls to pm_runtime_enable(), pm_runtime_get_sync() and
+tegra_adma_init() after the DMA channels have been initialised.
+
+Fixes: f33e7bb3eb92 ("dmaengine: tegra210-adma: restore channel status")
+
+Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/tegra210-adma.c | 26 +++++++++++++-------------
+ 1 file changed, 13 insertions(+), 13 deletions(-)
+
+--- a/drivers/dma/tegra210-adma.c
++++ b/drivers/dma/tegra210-adma.c
+@@ -743,16 +743,6 @@ static int tegra_adma_probe(struct platf
+ if (ret)
+ goto clk_destroy;
+
+- pm_runtime_enable(&pdev->dev);
+-
+- ret = pm_runtime_get_sync(&pdev->dev);
+- if (ret < 0)
+- goto rpm_disable;
+-
+- ret = tegra_adma_init(tdma);
+- if (ret)
+- goto rpm_put;
+-
+ INIT_LIST_HEAD(&tdma->dma_dev.channels);
+ for (i = 0; i < tdma->nr_channels; i++) {
+ struct tegra_adma_chan *tdc = &tdma->channels[i];
+@@ -770,6 +760,16 @@ static int tegra_adma_probe(struct platf
+ tdc->tdma = tdma;
+ }
+
++ pm_runtime_enable(&pdev->dev);
++
++ ret = pm_runtime_get_sync(&pdev->dev);
++ if (ret < 0)
++ goto rpm_disable;
++
++ ret = tegra_adma_init(tdma);
++ if (ret)
++ goto rpm_put;
++
+ dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask);
+ dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask);
+ dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask);
+@@ -811,13 +811,13 @@ static int tegra_adma_probe(struct platf
+
+ dma_remove:
+ dma_async_device_unregister(&tdma->dma_dev);
+-irq_dispose:
+- while (--i >= 0)
+- irq_dispose_mapping(tdma->channels[i].irq);
+ rpm_put:
+ pm_runtime_put_sync(&pdev->dev);
+ rpm_disable:
+ pm_runtime_disable(&pdev->dev);
++irq_dispose:
++ while (--i >= 0)
++ irq_dispose_mapping(tdma->channels[i].irq);
+ clk_destroy:
+ pm_clk_destroy(&pdev->dev);
+
diff --git a/patches.drivers/dmaengine-tegra210-adma-restore-channel-status.patch b/patches.drivers/dmaengine-tegra210-adma-restore-channel-status.patch
new file mode 100644
index 0000000000..e8d88c5b30
--- /dev/null
+++ b/patches.drivers/dmaengine-tegra210-adma-restore-channel-status.patch
@@ -0,0 +1,118 @@
+From f33e7bb3eb922618612a90f0a828c790e8880773 Mon Sep 17 00:00:00 2001
+From: Sameer Pujar <spujar@nvidia.com>
+Date: Thu, 2 May 2019 18:25:17 +0530
+Subject: [PATCH] dmaengine: tegra210-adma: restore channel status
+Git-commit: f33e7bb3eb922618612a90f0a828c790e8880773
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Status of ADMA channel registers is not saved and restored during system
+suspend. During active playback if system enters suspend, this results in
+wrong state of channel registers during system resume and playback fails
+to resume properly. Fix this by saving following channel registers in
+runtime suspend and restore during runtime resume.
+ * ADMA_CH_LOWER_SRC_ADDR
+ * ADMA_CH_LOWER_TRG_ADDR
+ * ADMA_CH_FIFO_CTRL
+ * ADMA_CH_CONFIG
+ * ADMA_CH_CTRL
+ * ADMA_CH_CMD
+ * ADMA_CH_TC
+Runtime PM calls will be inovked during system resume path if a playback
+or capture needs to be resumed. Hence above changes work fine for system
+suspend case.
+
+Fixes: f46b195799b5 ("dmaengine: tegra-adma: Add support for Tegra210 ADMA")
+Signed-off-by: Sameer Pujar <spujar@nvidia.com>
+Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/tegra210-adma.c | 45 +++++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 44 insertions(+), 1 deletion(-)
+
+--- a/drivers/dma/tegra210-adma.c
++++ b/drivers/dma/tegra210-adma.c
+@@ -99,6 +99,7 @@ struct tegra_adma_chan_regs {
+ unsigned int src_addr;
+ unsigned int trg_addr;
+ unsigned int fifo_ctrl;
++ unsigned int cmd;
+ unsigned int tc;
+ };
+
+@@ -128,6 +129,7 @@ struct tegra_adma_chan {
+ enum dma_transfer_direction sreq_dir;
+ unsigned int sreq_index;
+ bool sreq_reserved;
++ struct tegra_adma_chan_regs ch_regs;
+
+ /* Transfer count and position info */
+ unsigned int tx_buf_count;
+@@ -635,16 +637,39 @@ static struct dma_chan *tegra_dma_of_xla
+ static int tegra_adma_runtime_suspend(struct device *dev)
+ {
+ struct tegra_adma *tdma = dev_get_drvdata(dev);
++ struct tegra_adma_chan_regs *ch_reg;
++ struct tegra_adma_chan *tdc;
++ int i;
+
+ tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD);
++ if (!tdma->global_cmd)
++ goto clk_disable;
+
++ for (i = 0; i < tdma->nr_channels; i++) {
++ tdc = &tdma->channels[i];
++ ch_reg = &tdc->ch_regs;
++ ch_reg->cmd = tdma_ch_read(tdc, ADMA_CH_CMD);
++ /* skip if channel is not active */
++ if (!ch_reg->cmd)
++ continue;
++ ch_reg->tc = tdma_ch_read(tdc, ADMA_CH_TC);
++ ch_reg->src_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_SRC_ADDR);
++ ch_reg->trg_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_TRG_ADDR);
++ ch_reg->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);
++ ch_reg->fifo_ctrl = tdma_ch_read(tdc, ADMA_CH_FIFO_CTRL);
++ ch_reg->config = tdma_ch_read(tdc, ADMA_CH_CONFIG);
++ }
++
++clk_disable:
+ return pm_clk_suspend(dev);
+ }
+
+ static int tegra_adma_runtime_resume(struct device *dev)
+ {
+ struct tegra_adma *tdma = dev_get_drvdata(dev);
+- int ret;
++ struct tegra_adma_chan_regs *ch_reg;
++ struct tegra_adma_chan *tdc;
++ int ret, i;
+
+ ret = pm_clk_resume(dev);
+ if (ret)
+@@ -652,6 +677,24 @@ static int tegra_adma_runtime_resume(str
+
+ tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd);
+
++ if (!tdma->global_cmd)
++ return 0;
++
++ for (i = 0; i < tdma->nr_channels; i++) {
++ tdc = &tdma->channels[i];
++ ch_reg = &tdc->ch_regs;
++ /* skip if channel was not active earlier */
++ if (!ch_reg->cmd)
++ continue;
++ tdma_ch_write(tdc, ADMA_CH_TC, ch_reg->tc);
++ tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_reg->src_addr);
++ tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_reg->trg_addr);
++ tdma_ch_write(tdc, ADMA_CH_CTRL, ch_reg->ctrl);
++ tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl);
++ tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_reg->config);
++ tdma_ch_write(tdc, ADMA_CH_CMD, ch_reg->cmd);
++ }
++
+ return 0;
+ }
+
diff --git a/patches.drivers/drivers-dma-ioat-Remove-now-redundant-smp_read_barri.patch b/patches.drivers/drivers-dma-ioat-Remove-now-redundant-smp_read_barri.patch
new file mode 100644
index 0000000000..d4602bab6a
--- /dev/null
+++ b/patches.drivers/drivers-dma-ioat-Remove-now-redundant-smp_read_barri.patch
@@ -0,0 +1,49 @@
+From 98c1ec7cefaadbf65680d116c3d8612b93a841a0 Mon Sep 17 00:00:00 2001
+From: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
+Date: Fri, 1 Dec 2017 17:04:39 -0800
+Subject: [PATCH] drivers/dma/ioat: Remove now-redundant smp_read_barrier_depends()
+Git-commit: 98c1ec7cefaadbf65680d116c3d8612b93a841a0
+Patch-mainline: v4.16-rc1
+References: jsc#SLE-5442
+
+Now that READ_ONCE() implies smp_read_barrier_depends(), the
+__cleanup() and ioat_abort_descs() functions no longer need their
+smp_read_barrier_depends() calls, which this commit removes.
+It is actually not entirely clear why this driver ever included
+smp_read_barrier_depends() given that it appears to be x86-only and
+given that smp_read_barrier_depends() has no effect whatsoever except
+on DEC Alpha.
+
+Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
+Cc: Vinod Koul <vinod.koul@intel.com>
+Cc: Dan Williams <dan.j.williams@intel.com>
+Cc: <dmaengine@vger.kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/dma/ioat/dma.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
+index 58d4ccd33672..8b5b23a8ace9 100644
+--- a/drivers/dma/ioat/dma.c
++++ b/drivers/dma/ioat/dma.c
+@@ -597,7 +597,6 @@ static void __cleanup(struct ioatdma_chan *ioat_chan, dma_addr_t phys_complete)
+ for (i = 0; i < active && !seen_current; i++) {
+ struct dma_async_tx_descriptor *tx;
+
+- smp_read_barrier_depends();
+ prefetch(ioat_get_ring_ent(ioat_chan, idx + i + 1));
+ desc = ioat_get_ring_ent(ioat_chan, idx + i);
+ dump_desc_dbg(ioat_chan, desc);
+@@ -715,7 +714,6 @@ static void ioat_abort_descs(struct ioatdma_chan *ioat_chan)
+ for (i = 1; i < active; i++) {
+ struct dma_async_tx_descriptor *tx;
+
+- smp_read_barrier_depends();
+ prefetch(ioat_get_ring_ent(ioat_chan, idx + i + 1));
+ desc = ioat_get_ring_ent(ioat_chan, idx + i);
+
+--
+2.16.4
+
diff --git a/patches.drivers/hid-input-fix-a4tech-horizontal-wheel-custom-usage.patch b/patches.drivers/hid-input-fix-a4tech-horizontal-wheel-custom-usage.patch
new file mode 100644
index 0000000000..5854f9886e
--- /dev/null
+++ b/patches.drivers/hid-input-fix-a4tech-horizontal-wheel-custom-usage.patch
@@ -0,0 +1,90 @@
+From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Date: Tue, 11 Jun 2019 14:13:20 +0200
+Subject: HID: input: fix a4tech horizontal wheel custom usage
+Patch-mainline: Submitted, https://lkml.kernel.org/lkml/5346893.KeHrH3GHoD@linux-lf90.site/T/
+References: bsc#1137429
+
+Some a4tech mice use the 'GenericDesktop.00b8' usage to inform whether
+the previous wheel report was horizontal or vertical. Before
+c01908a14bf73 ("HID: input: add mapping for "Toggle Display" key") this
+usage was being mapped to 'Relative.Misc'. After the patch it's simply
+ignored (usage->type == 0 & usage->code == 0). Which ultimately makes
+hid-a4tech ignore the WHEEL/HWHEEL selection event, as it has no
+usage->type.
+
+We shouldn't rely on a mapping for that usage as it's nonstandard and
+doesn't really map to an input event. So we bypass the mapping and make
+sure the custom event handling properly handles both reports.
+
+Fixes: c01908a14bf73 ("HID: input: add mapping for "Toggle Display" key")
+Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+---
+ drivers/hid/hid-a4tech.c | 30 +++++++++++++++++++++++++++---
+ 1 file changed, 27 insertions(+), 3 deletions(-)
+
+--- a/drivers/hid/hid-a4tech.c
++++ b/drivers/hid/hid-a4tech.c
+@@ -26,12 +26,36 @@
+ #define A4_2WHEEL_MOUSE_HACK_7 0x01
+ #define A4_2WHEEL_MOUSE_HACK_B8 0x02
+
++#define A4_WHEEL_ORIENTATION (HID_UP_GENDESK | 0x000000b8)
++
+ struct a4tech_sc {
+ unsigned long quirks;
+ unsigned int hw_wheel;
+ __s32 delayed_value;
+ };
+
++static int a4_input_mapping(struct hid_device *hdev, struct hid_input *hi,
++ struct hid_field *field, struct hid_usage *usage,
++ unsigned long **bit, int *max)
++{
++ struct a4tech_sc *a4 = hid_get_drvdata(hdev);
++
++ if (a4->quirks & A4_2WHEEL_MOUSE_HACK_B8 &&
++ usage->hid == A4_WHEEL_ORIENTATION) {
++ /*
++ * We do not want to have this usage mapped to anything as it's
++ * nonstandard and doesn't really behave like an HID report.
++ * It's only selecting the orientation (vertical/horizontal) of
++ * the previous mouse wheel report. The input_events will be
++ * generated once both reports are recorded in a4_event().
++ */
++ return -1;
++ }
++
++ return 0;
++
++}
++
+ static int a4_input_mapped(struct hid_device *hdev, struct hid_input *hi,
+ struct hid_field *field, struct hid_usage *usage,
+ unsigned long **bit, int *max)
+@@ -53,8 +77,7 @@ static int a4_event(struct hid_device *h
+ struct a4tech_sc *a4 = hid_get_drvdata(hdev);
+ struct input_dev *input;
+
+- if (!(hdev->claimed & HID_CLAIMED_INPUT) || !field->hidinput ||
+- !usage->type)
++ if (!(hdev->claimed & HID_CLAIMED_INPUT) || !field->hidinput)
+ return 0;
+
+ input = field->hidinput->input;
+@@ -65,7 +88,7 @@ static int a4_event(struct hid_device *h
+ return 1;
+ }
+
+- if (usage->hid == 0x000100b8) {
++ if (usage->hid == A4_WHEEL_ORIENTATION) {
+ input_event(input, EV_REL, value ? REL_HWHEEL :
+ REL_WHEEL, a4->delayed_value);
+ return 1;
+@@ -129,6 +152,7 @@ MODULE_DEVICE_TABLE(hid, a4_devices);
+ static struct hid_driver a4_driver = {
+ .name = "a4tech",
+ .id_table = a4_devices,
++ .input_mapping = a4_input_mapping,
+ .input_mapped = a4_input_mapped,
+ .event = a4_event,
+ .probe = a4_probe,
diff --git a/patches.drivers/i2c-i801-Add-support-for-Intel-Comet-Lake.patch b/patches.drivers/i2c-i801-Add-support-for-Intel-Comet-Lake.patch
new file mode 100644
index 0000000000..9eb33d3177
--- /dev/null
+++ b/patches.drivers/i2c-i801-Add-support-for-Intel-Comet-Lake.patch
@@ -0,0 +1,84 @@
+From 5cd1c56c42beb6d228cc8d4373fdc5f5ec78a5ad Mon Sep 17 00:00:00 2001
+From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
+Date: Fri, 15 Mar 2019 12:56:49 +0200
+Subject: [PATCH] i2c: i801: Add support for Intel Comet Lake
+Git-commit: 5cd1c56c42beb6d228cc8d4373fdc5f5ec78a5ad
+Patch-mainline: v5.1-rc3
+References: jsc#SLE-5331
+
+Add PCI ID for Intel Comet Lake PCH.
+
+Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
+Reviewed-by: Jean Delvare <jdelvare@suse.de>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ Documentation/i2c/busses/i2c-i801 | 1 +
+ drivers/i2c/busses/Kconfig | 1 +
+ drivers/i2c/busses/i2c-i801.c | 4 ++++
+ 3 files changed, 6 insertions(+)
+
+diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801
+index d1ee484a787d..ee9984f35868 100644
+--- a/Documentation/i2c/busses/i2c-i801
++++ b/Documentation/i2c/busses/i2c-i801
+@@ -36,6 +36,7 @@ Supported adapters:
+ * Intel Cannon Lake (PCH)
+ * Intel Cedar Fork (PCH)
+ * Intel Ice Lake (PCH)
++ * Intel Comet Lake (PCH)
+ Datasheets: Publicly available at the Intel website
+
+ On Intel Patsburg and later chipsets, both the normal host SMBus controller
+diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
+index f2c681971201..f8979abb9a19 100644
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -131,6 +131,7 @@ config I2C_I801
+ Cannon Lake (PCH)
+ Cedar Fork (PCH)
+ Ice Lake (PCH)
++ Comet Lake (PCH)
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-i801.
+diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
+index c91e145ef5a5..679c6c41f64b 100644
+--- a/drivers/i2c/busses/i2c-i801.c
++++ b/drivers/i2c/busses/i2c-i801.c
+@@ -71,6 +71,7 @@
+ * Cannon Lake-LP (PCH) 0x9da3 32 hard yes yes yes
+ * Cedar Fork (PCH) 0x18df 32 hard yes yes yes
+ * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes
++ * Comet Lake (PCH) 0x02a3 32 hard yes yes yes
+ *
+ * Features supported by this driver:
+ * Software PEC no
+@@ -240,6 +241,7 @@
+ #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223
+ #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3
+ #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323
++#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3
+
+ struct i801_mux_config {
+ char *gpio_chip;
+@@ -1038,6 +1040,7 @@ static const struct pci_device_id i801_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) },
++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) },
+ { 0, }
+ };
+
+@@ -1534,6 +1537,7 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
+ case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
+ case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS:
+ case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
++ case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
+ priv->features |= FEATURE_I2C_BLOCK_READ;
+ priv->features |= FEATURE_IRQ;
+ priv->features |= FEATURE_SMBUS_PEC;
+--
+2.16.4
+
diff --git a/patches.drivers/i2c-synquacer-fix-synquacer_i2c_doxfer-return-value.patch b/patches.drivers/i2c-synquacer-fix-synquacer_i2c_doxfer-return-value.patch
new file mode 100644
index 0000000000..1c8934c2ad
--- /dev/null
+++ b/patches.drivers/i2c-synquacer-fix-synquacer_i2c_doxfer-return-value.patch
@@ -0,0 +1,39 @@
+From ff9378904d9d7a3fcb8406604e089e535e357b1d Mon Sep 17 00:00:00 2001
+From: Masahisa Kojima <masahisa.kojima@linaro.org>
+Date: Tue, 21 May 2019 10:33:50 +0900
+Subject: [PATCH] i2c: synquacer: fix synquacer_i2c_doxfer() return value
+Git-commit: ff9378904d9d7a3fcb8406604e089e535e357b1d
+Patch-mainline: v5.2-rc3
+References: bsc#1111666
+
+master_xfer should return the number of messages successfully
+processed.
+
+Fixes: 0d676a6c4390 ("i2c: add support for Socionext SynQuacer I2C controller")
+Cc: <stable@vger.kernel.org> # v4.19+
+Signed-off-by: Okamoto Satoru <okamoto.satoru@socionext.com>
+Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
+Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/i2c/busses/i2c-synquacer.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/i2c/busses/i2c-synquacer.c b/drivers/i2c/busses/i2c-synquacer.c
+index f14d4b3fab44..f724c8e6b360 100644
+--- a/drivers/i2c/busses/i2c-synquacer.c
++++ b/drivers/i2c/busses/i2c-synquacer.c
+@@ -351,7 +351,7 @@ static int synquacer_i2c_doxfer(struct synquacer_i2c *i2c,
+ /* wait 2 clock periods to ensure the stop has been through the bus */
+ udelay(DIV_ROUND_UP(2 * 1000, i2c->speed_khz));
+
+- return 0;
++ return ret;
+ }
+
+ static irqreturn_t synquacer_i2c_isr(int irq, void *dev_id)
+--
+2.16.4
+
diff --git a/patches.drivers/iw_cxgb4-Fix-qpid-leak.patch b/patches.drivers/iw_cxgb4-Fix-qpid-leak.patch
new file mode 100644
index 0000000000..3c3efcc259
--- /dev/null
+++ b/patches.drivers/iw_cxgb4-Fix-qpid-leak.patch
@@ -0,0 +1,132 @@
+From: Nirranjan Kirubaharan <nirranjan@chelsio.com>
+Date: Thu, 23 May 2019 00:05:39 -0700
+Subject: iw_cxgb4: Fix qpid leak
+Patch-mainline: Queued in subsystem maintainer repository
+Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git
+Git-commit: f70baa7ee3d1b5a9e66ac7549e31641a656f23c1
+References: bsc#1136348 jsc#SLE-4684
+
+Add await in destroy_qp() so that all references to qp are dereferenced
+and qp is freed in destroy_qp() itself. This ensures freeing of all QPs
+before invocation of dealloc_ucontext(), which prevents loss of in use
+qpids stored in the ucontext.
+
+Signed-off-by: Nirranjan Kirubaharan <nirranjan@chelsio.com>
+Reviewed-by: Potnuri Bharat Teja <bharat@chelsio.com>
+Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/infiniband/hw/cxgb4/iw_cxgb4.h | 4 +-
+ drivers/infiniband/hw/cxgb4/qp.c | 48 +++++++++++----------------------
+ 2 files changed, 19 insertions(+), 33 deletions(-)
+
+--- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
++++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+@@ -549,14 +549,14 @@ struct c4iw_qp {
+ struct t4_wq wq;
+ spinlock_t lock;
+ struct mutex mutex;
+- struct kref kref;
+ wait_queue_head_t wait;
+ struct timer_list timer;
+ int sq_sig_all;
+ struct c4iw_srq *srq;
+- struct work_struct free_work;
+ struct c4iw_ucontext *ucontext;
+ struct c4iw_wr_wait *wr_waitp;
++ struct completion qp_rel_comp;
++ refcount_t qp_refcnt;
+ };
+
+ static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp)
+--- a/drivers/infiniband/hw/cxgb4/qp.c
++++ b/drivers/infiniband/hw/cxgb4/qp.c
+@@ -889,43 +889,17 @@ static int build_inv_stag(union t4_wr *w
+ return 0;
+ }
+
+-static void free_qp_work(struct work_struct *work)
+-{
+- struct c4iw_ucontext *ucontext;
+- struct c4iw_qp *qhp;
+- struct c4iw_dev *rhp;
+-
+- qhp = container_of(work, struct c4iw_qp, free_work);
+- ucontext = qhp->ucontext;
+- rhp = qhp->rhp;
+-
+- pr_debug("qhp %p ucontext %p\n", qhp, ucontext);
+- destroy_qp(&rhp->rdev, &qhp->wq,
+- ucontext ? &ucontext->uctx : &rhp->rdev.uctx, !qhp->srq);
+-
+- c4iw_put_wr_wait(qhp->wr_waitp);
+- kfree(qhp);
+-}
+-
+-static void queue_qp_free(struct kref *kref)
+-{
+- struct c4iw_qp *qhp;
+-
+- qhp = container_of(kref, struct c4iw_qp, kref);
+- pr_debug("qhp %p\n", qhp);
+- queue_work(qhp->rhp->rdev.free_workq, &qhp->free_work);
+-}
+-
+ void c4iw_qp_add_ref(struct ib_qp *qp)
+ {
+ pr_debug("ib_qp %p\n", qp);
+- kref_get(&to_c4iw_qp(qp)->kref);
++ refcount_inc(&to_c4iw_qp(qp)->qp_refcnt);
+ }
+
+ void c4iw_qp_rem_ref(struct ib_qp *qp)
+ {
+ pr_debug("ib_qp %p\n", qp);
+- kref_put(&to_c4iw_qp(qp)->kref, queue_qp_free);
++ if (refcount_dec_and_test(&to_c4iw_qp(qp)->qp_refcnt))
++ complete(&to_c4iw_qp(qp)->qp_rel_comp);
+ }
+
+ static void add_to_fc_list(struct list_head *head, struct list_head *entry)
+@@ -2097,10 +2071,12 @@ int c4iw_destroy_qp(struct ib_qp *ib_qp)
+ {
+ struct c4iw_dev *rhp;
+ struct c4iw_qp *qhp;
++ struct c4iw_ucontext *ucontext;
+ struct c4iw_qp_attributes attrs;
+
+ qhp = to_c4iw_qp(ib_qp);
+ rhp = qhp->rhp;
++ ucontext = qhp->ucontext;
+
+ attrs.next_state = C4IW_QP_STATE_ERROR;
+ if (qhp->attr.state == C4IW_QP_STATE_TERMINATE)
+@@ -2119,7 +2095,17 @@ int c4iw_destroy_qp(struct ib_qp *ib_qp)
+
+ c4iw_qp_rem_ref(ib_qp);
+
++ wait_for_completion(&qhp->qp_rel_comp);
++
+ pr_debug("ib_qp %p qpid 0x%0x\n", ib_qp, qhp->wq.sq.qid);
++ pr_debug("qhp %p ucontext %p\n", qhp, ucontext);
++
++ destroy_qp(&rhp->rdev, &qhp->wq,
++ ucontext ? &ucontext->uctx : &rhp->rdev.uctx, !qhp->srq);
++
++ c4iw_put_wr_wait(qhp->wr_waitp);
++
++ kfree(qhp);
+ return 0;
+ }
+
+@@ -2230,8 +2216,8 @@ struct ib_qp *c4iw_create_qp(struct ib_p
+ spin_lock_init(&qhp->lock);
+ mutex_init(&qhp->mutex);
+ init_waitqueue_head(&qhp->wait);
+- kref_init(&qhp->kref);
+- INIT_WORK(&qhp->free_work, free_qp_work);
++ init_completion(&qhp->qp_rel_comp);
++ refcount_set(&qhp->qp_refcnt, 1);
+
+ ret = insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.sq.qid);
+ if (ret)
diff --git a/patches.drivers/mtd-spi-nor-intel-spi-Add-support-for-Intel-Ice-Lake.patch b/patches.drivers/mtd-spi-nor-intel-spi-Add-support-for-Intel-Ice-Lake.patch
new file mode 100644
index 0000000000..13509fafbf
--- /dev/null
+++ b/patches.drivers/mtd-spi-nor-intel-spi-Add-support-for-Intel-Ice-Lake.patch
@@ -0,0 +1,37 @@
+From 42460c31ae96cbad5ae226ee6c10bd8d70d764ae Mon Sep 17 00:00:00 2001
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+Date: Thu, 30 Aug 2018 11:42:57 +0300
+Subject: [PATCH] mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flash
+Git-commit: 42460c31ae96cbad5ae226ee6c10bd8d70d764ae
+Patch-mainline: v4.20-rc1
+References: jsc#SLE-5358
+
+Intel Ice Lake exposes the SPI serial flash controller as a PCI device
+in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI
+ID to the driver list of supported devices.
+
+Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Acked-by: Marek Vasut <marek.vasut@gmail.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/mtd/spi-nor/intel-spi-pci.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c
+index c0976f2e3dd1..872b40922608 100644
+--- a/drivers/mtd/spi-nor/intel-spi-pci.c
++++ b/drivers/mtd/spi-nor/intel-spi-pci.c
+@@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev)
+ static const struct pci_device_id intel_spi_pci_ids[] = {
+ { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info },
+ { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info },
++ { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info },
+ { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
+ { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
+ { },
+--
+2.16.4
+
diff --git a/patches.drivers/spi-nor-intel-spi-Add-support-for-Intel-Comet-Lake-S.patch b/patches.drivers/spi-nor-intel-spi-Add-support-for-Intel-Comet-Lake-S.patch
new file mode 100644
index 0000000000..023631adc6
--- /dev/null
+++ b/patches.drivers/spi-nor-intel-spi-Add-support-for-Intel-Comet-Lake-S.patch
@@ -0,0 +1,35 @@
+From e43f53c22a937d024f070907d02539e413f20c15 Mon Sep 17 00:00:00 2001
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+Date: Tue, 16 Apr 2019 12:11:10 +0300
+Subject: [PATCH] spi-nor: intel-spi: Add support for Intel Comet Lake SPI serial flash
+Git-commit: e43f53c22a937d024f070907d02539e413f20c15
+Patch-mainline: v5.2-rc1
+References: jsc#SLE-5358
+
+Intel Comet Lake has the same SPI serial flash controller as Ice Lake.
+Add Comet Lake PCI ID to the driver list of supported devices.
+
+Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
+Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/mtd/spi-nor/intel-spi-pci.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c
+index 872b40922608..bfbfc17ed6aa 100644
+--- a/drivers/mtd/spi-nor/intel-spi-pci.c
++++ b/drivers/mtd/spi-nor/intel-spi-pci.c
+@@ -63,6 +63,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev)
+ }
+
+ static const struct pci_device_id intel_spi_pci_ids[] = {
++ { PCI_VDEVICE(INTEL, 0x02a4), (unsigned long)&bxt_info },
+ { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info },
+ { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info },
+ { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info },
+--
+2.16.4
+
diff --git a/patches.drivers/spi-pxa2xx-Add-support-for-Intel-Comet-Lake.patch b/patches.drivers/spi-pxa2xx-Add-support-for-Intel-Comet-Lake.patch
new file mode 100644
index 0000000000..db0c87fcdb
--- /dev/null
+++ b/patches.drivers/spi-pxa2xx-Add-support-for-Intel-Comet-Lake.patch
@@ -0,0 +1,38 @@
+From 41a918026407be4ca2727cd0d6243fe6cdbfc4ed Mon Sep 17 00:00:00 2001
+From: Evan Green <evgreen@chromium.org>
+Date: Mon, 15 Apr 2019 20:27:43 -0700
+Subject: [PATCH] spi: pxa2xx: Add support for Intel Comet Lake
+Git-commit: 41a918026407be4ca2727cd0d6243fe6cdbfc4ed
+Patch-mainline: v5.2-rc1
+References: jsc#SLE-5331
+
+Add PCI IDs for SPI on Comet Lake.
+
+Signed-off-by: Evan Green <evgreen@chromium.org>
+Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/spi/spi-pxa2xx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
+index 3e6811ef37e8..f5546eeaebe4 100644
+--- a/drivers/spi/spi-pxa2xx.c
++++ b/drivers/spi/spi-pxa2xx.c
+@@ -1454,6 +1454,10 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
+ { PCI_VDEVICE(INTEL, 0xa32a), LPSS_CNL_SSP },
+ { PCI_VDEVICE(INTEL, 0xa32b), LPSS_CNL_SSP },
+ { PCI_VDEVICE(INTEL, 0xa37b), LPSS_CNL_SSP },
++ /* CML-LP */
++ { PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP },
++ { PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP },
++ { PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP },
+ { },
+ };
+
+--
+2.16.4
+
diff --git a/patches.drm/drm-add-non-desktop-quirk-for-Valve-HMDs.patch b/patches.drm/drm-add-non-desktop-quirk-for-Valve-HMDs.patch
new file mode 100644
index 0000000000..c97c37edeb
--- /dev/null
+++ b/patches.drm/drm-add-non-desktop-quirk-for-Valve-HMDs.patch
@@ -0,0 +1,54 @@
+From 30d62d4453e49f85dd17b2ba60bbb68b6593dba0 Mon Sep 17 00:00:00 2001
+From: Andres Rodriguez <andresx7@gmail.com>
+Date: Thu, 2 May 2019 15:31:57 -0400
+Subject: [PATCH] drm: add non-desktop quirk for Valve HMDs
+Git-commit: 30d62d4453e49f85dd17b2ba60bbb68b6593dba0
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Add vendor/product pairs for the Valve Index HMDs.
+
+Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
+Cc: Dave Airlie <airlied@redhat.com>
+Cc: <stable@vger.kernel.org> # v4.15
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190502193157.15692-1-andresx7@gmail.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/drm_edid.c | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
+index 2c22ea446075..649cfd8b4200 100644
+--- a/drivers/gpu/drm/drm_edid.c
++++ b/drivers/gpu/drm/drm_edid.c
+@@ -162,6 +162,25 @@ static const struct edid_quirk {
+ /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
+ { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
+
++ /* Valve Index Headset */
++ { "VLV", 0x91a8, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b0, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b1, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b2, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b3, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b4, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b5, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b6, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b7, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b8, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b9, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91ba, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bb, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bc, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bd, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91be, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bf, EDID_QUIRK_NON_DESKTOP },
++
+ /* HTC Vive and Vive Pro VR Headsets */
+ { "HVR", 0xaa01, EDID_QUIRK_NON_DESKTOP },
+ { "HVR", 0xaa02, EDID_QUIRK_NON_DESKTOP },
+--
+2.16.4
+
diff --git a/patches.drm/drm-add-non-desktop-quirks-to-Sensics-and-OSVR-heads.patch b/patches.drm/drm-add-non-desktop-quirks-to-Sensics-and-OSVR-heads.patch
new file mode 100644
index 0000000000..56baf8175a
--- /dev/null
+++ b/patches.drm/drm-add-non-desktop-quirks-to-Sensics-and-OSVR-heads.patch
@@ -0,0 +1,43 @@
+From 29054230f3e11ea818eccfa7bb4e4b3e89544164 Mon Sep 17 00:00:00 2001
+From: Ryan Pavlik <ryan.pavlik@collabora.com>
+Date: Mon, 3 Dec 2018 10:46:44 -0600
+Subject: [PATCH] drm: add non-desktop quirks to Sensics and OSVR headsets.
+Git-commit: 29054230f3e11ea818eccfa7bb4e4b3e89544164
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Add two EDID vendor/product pairs used across a variety of
+Sensics products, as well as the OSVR HDK and HDK 2.
+
+Signed-off-by: Ryan Pavlik <ryan.pavlik@collabora.com>
+Signed-off-by: Daniel Stone <daniels@collabora.com>
+Reviewed-by: Daniel Stone <daniels@collabora.com>
+Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
+Link: https://patchwork.freedesktop.org/patch/msgid/20181203164644.13974-1-ryan.pavlik@collabora.com
+Cc: <stable@vger.kernel.org> # v4.15+
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/drm_edid.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
+index 5f142530532a..fa39592ebc0a 100644
+--- a/drivers/gpu/drm/drm_edid.c
++++ b/drivers/gpu/drm/drm_edid.c
+@@ -193,6 +193,12 @@ static const struct edid_quirk {
+
+ /* Sony PlayStation VR Headset */
+ { "SNY", 0x0704, EDID_QUIRK_NON_DESKTOP },
++
++ /* Sensics VR Headsets */
++ { "SEN", 0x1019, EDID_QUIRK_NON_DESKTOP },
++
++ /* OSVR HDK and HDK2 VR Headsets */
++ { "SVR", 0x1019, EDID_QUIRK_NON_DESKTOP },
+ };
+
+ /*
+--
+2.16.4
+
diff --git a/patches.drm/drm-amd-display-Fix-Divide-by-0-in-memory-calculatio.patch b/patches.drm/drm-amd-display-Fix-Divide-by-0-in-memory-calculatio.patch
new file mode 100644
index 0000000000..5dc96b8a83
--- /dev/null
+++ b/patches.drm/drm-amd-display-Fix-Divide-by-0-in-memory-calculatio.patch
@@ -0,0 +1,59 @@
+From 59979bf8be1784ebfc44215031c6c88ca22ae65d Mon Sep 17 00:00:00 2001
+From: Murton Liu <murton.liu@amd.com>
+Date: Fri, 15 Feb 2019 15:05:43 -0500
+Subject: [PATCH] drm/amd/display: Fix Divide by 0 in memory calculations
+Git-commit: 59979bf8be1784ebfc44215031c6c88ca22ae65d
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Check if we get any values equal to 0, and set to 1 if so.
+
+Signed-off-by: Murton Liu <murton.liu@amd.com>
+Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Acked-by: Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | 20 +++++++++++++++-----
+ 1 file changed, 15 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
+index c7642e748297..ce21a290bf3e 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
+@@ -406,15 +406,25 @@ void dpp1_dscl_calc_lb_num_partitions(
+ int *num_part_y,
+ int *num_part_c)
+ {
++ int lb_memory_size, lb_memory_size_c, lb_memory_size_a, num_partitions_a,
++ lb_bpc, memory_line_size_y, memory_line_size_c, memory_line_size_a;
++
+ int line_size = scl_data->viewport.width < scl_data->recout.width ?
+ scl_data->viewport.width : scl_data->recout.width;
+ int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ?
+ scl_data->viewport_c.width : scl_data->recout.width;
+- int lb_bpc = dpp1_dscl_get_lb_depth_bpc(scl_data->lb_params.depth);
+- int memory_line_size_y = (line_size * lb_bpc + 71) / 72; /* +71 to ceil */
+- int memory_line_size_c = (line_size_c * lb_bpc + 71) / 72; /* +71 to ceil */
+- int memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */
+- int lb_memory_size, lb_memory_size_c, lb_memory_size_a, num_partitions_a;
++
++ if (line_size == 0)
++ line_size = 1;
++
++ if (line_size_c == 0)
++ line_size_c = 1;
++
++
++ lb_bpc = dpp1_dscl_get_lb_depth_bpc(scl_data->lb_params.depth);
++ memory_line_size_y = (line_size * lb_bpc + 71) / 72; /* +71 to ceil */
++ memory_line_size_c = (line_size_c * lb_bpc + 71) / 72; /* +71 to ceil */
++ memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */
+
+ if (lb_config == LB_MEMORY_CONFIG_1) {
+ lb_memory_size = 816;
+--
+2.16.4
+
diff --git a/patches.drm/drm-amd-display-Set-stream-mode_changed-when-connect.patch b/patches.drm/drm-amd-display-Set-stream-mode_changed-when-connect.patch
new file mode 100644
index 0000000000..3177634343
--- /dev/null
+++ b/patches.drm/drm-amd-display-Set-stream-mode_changed-when-connect.patch
@@ -0,0 +1,58 @@
+From b9952f93cd2cf5fca82b06a8179c0f5f7b769e83 Mon Sep 17 00:00:00 2001
+From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Date: Fri, 8 Feb 2019 13:21:05 -0500
+Subject: [PATCH] drm/amd/display: Set stream->mode_changed when connectors change
+Git-commit: b9952f93cd2cf5fca82b06a8179c0f5f7b769e83
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+[Why]
+The kms_plane@plane-position-covered-pipe-*-planes subtests can produce
+a sequence of atomic commits such that neither active_changed nor
+mode_changed but connectors_changed.
+
+When this happens we remove the old stream from the context and add
+a new stream but the new stream doesn't have mode_changed=true set.
+
+This incorrect programming sequence causes CRC mismatches to occur in
+the test.
+
+The stream->mode_changed value should be set whenever a new stream
+is created.
+
+[How]
+A new stream is created whenever drm_atomic_crtc_needs_modeset is true.
+We previously covered the active_changed and mode_changed conditions
+for the CRTC but connectors_changed is also checked within
+drm_atomic_crtc_needs_modeset.
+
+So just use drm_atomic_crtc_needs_modeset directly to determine the
+mode_changed flag.
+
+Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index f9b57d32636b..b7cc14683065 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -4922,8 +4922,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
+ static void amdgpu_dm_crtc_copy_transient_flags(struct drm_crtc_state *crtc_state,
+ struct dc_stream_state *stream_state)
+ {
+- stream_state->mode_changed =
+- crtc_state->mode_changed || crtc_state->active_changed;
++ stream_state->mode_changed = drm_atomic_crtc_needs_modeset(crtc_state);
+ }
+
+ static int amdgpu_dm_atomic_commit(struct drm_device *dev,
+--
+2.16.4
+
diff --git a/patches.drm/drm-amd-display-fix-releasing-planes-when-exiting-od.patch b/patches.drm/drm-amd-display-fix-releasing-planes-when-exiting-od.patch
new file mode 100644
index 0000000000..f9e95b0f23
--- /dev/null
+++ b/patches.drm/drm-amd-display-fix-releasing-planes-when-exiting-od.patch
@@ -0,0 +1,44 @@
+From bc2193992b00488f5734613ac95b78ef2d2803ab Mon Sep 17 00:00:00 2001
+From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Date: Thu, 7 Mar 2019 13:26:13 -0500
+Subject: [PATCH] drm/amd/display: fix releasing planes when exiting odm
+Git-commit: bc2193992b00488f5734613ac95b78ef2d2803ab
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Releasing planes should not release the 2nd odm pipe right away,
+this change leaves us with 2 pipes with null planes and same stream
+when planes are released during odm.
+
+Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+index 79e760ac3600..ec0e2ad5f1c3 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+@@ -1293,10 +1293,12 @@ bool dc_remove_plane_from_context(
+ * For head pipe detach surfaces from pipe for tail
+ * pipe just zero it out
+ */
+- if (!pipe_ctx->top_pipe) {
++ if (!pipe_ctx->top_pipe ||
++ (!pipe_ctx->top_pipe->top_pipe &&
++ pipe_ctx->top_pipe->stream_res.opp != pipe_ctx->stream_res.opp)) {
+ pipe_ctx->plane_state = NULL;
+ pipe_ctx->bottom_pipe = NULL;
+- } else {
++ } else {
+ memset(pipe_ctx, 0, sizeof(*pipe_ctx));
+ }
+ }
+--
+2.16.4
+
diff --git a/patches.drm/drm-amdgpu-psp-move-psp-version-specific-function-po.patch b/patches.drm/drm-amdgpu-psp-move-psp-version-specific-function-po.patch
new file mode 100644
index 0000000000..4c2916382b
--- /dev/null
+++ b/patches.drm/drm-amdgpu-psp-move-psp-version-specific-function-po.patch
@@ -0,0 +1,62 @@
+From 9d6fea5744d6798353f37ac42a8a653a2607ca69 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 8 May 2019 21:45:06 -0500
+Subject: [PATCH] drm/amdgpu/psp: move psp version specific function pointers to early_init
+Mime-version: 1.0
+Content-type: text/plain; charset=UTF-8
+Content-transfer-encoding: 8bit
+Git-commit: 9d6fea5744d6798353f37ac42a8a653a2607ca69
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+In case we need to use them for GPU reset prior initializing the
+asic. Fixes a crash if the driver attempts to reset the GPU at driver
+load time.
+
+Acked-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 19 ++++++++++---------
+ 1 file changed, 10 insertions(+), 9 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+@@ -37,18 +37,10 @@ static void psp_set_funcs(struct amdgpu_
+ static int psp_early_init(void *handle)
+ {
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
++ struct psp_context *psp = &adev->psp;
+
+ psp_set_funcs(adev);
+
+- return 0;
+-}
+-
+-static int psp_sw_init(void *handle)
+-{
+- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+- struct psp_context *psp = &adev->psp;
+- int ret;
+-
+ switch (adev->asic_type) {
+ case CHIP_VEGA10:
+ case CHIP_VEGA12:
+@@ -67,6 +59,15 @@ static int psp_sw_init(void *handle)
+ if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
+ return 0;
+
++ return 0;
++}
++
++static int psp_sw_init(void *handle)
++{
++ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
++ struct psp_context *psp = &adev->psp;
++ int ret;
++
+ ret = psp_init_microcode(psp);
+ if (ret) {
+ DRM_ERROR("Failed to load psp firmware!\n");
diff --git a/patches.drm/drm-amdgpu-remove-ATPX_DGPU_REQ_POWER_FOR_DISPLAYS-c.patch b/patches.drm/drm-amdgpu-remove-ATPX_DGPU_REQ_POWER_FOR_DISPLAYS-c.patch
new file mode 100644
index 0000000000..597bb1f295
--- /dev/null
+++ b/patches.drm/drm-amdgpu-remove-ATPX_DGPU_REQ_POWER_FOR_DISPLAYS-c.patch
@@ -0,0 +1,39 @@
+From bdb1ccb080dafc1b4224873a5b759ff85a7d1c10 Mon Sep 17 00:00:00 2001
+From: Aaron Liu <aaron.liu@amd.com>
+Date: Tue, 30 Apr 2019 09:47:25 +0800
+Subject: [PATCH] drm/amdgpu: remove ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check when hotplug-in
+Git-commit: bdb1ccb080dafc1b4224873a5b759ff85a7d1c10
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+In amdgpu_atif_handler, when hotplug event received, remove
+ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check. This bit's check will cause missing
+system resume.
+
+Signed-off-by: Aaron Liu <aaron.liu@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+index 4376b17ca594..56f8ca2a3bb4 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+@@ -464,8 +464,7 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
+ }
+ }
+ if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {
+- if ((adev->flags & AMD_IS_PX) &&
+- amdgpu_atpx_dgpu_req_power_for_displays()) {
++ if (adev->flags & AMD_IS_PX) {
+ pm_runtime_get_sync(adev->ddev->dev);
+ /* Just fire off a uevent and let userspace tell us what to do */
+ drm_helper_hpd_irq_event(adev->ddev);
+--
+2.16.4
+
diff --git a/patches.drm/drm-don-t-block-fb-changes-for-async-plane-updates.patch b/patches.drm/drm-don-t-block-fb-changes-for-async-plane-updates.patch
new file mode 100644
index 0000000000..668e0da6d2
--- /dev/null
+++ b/patches.drm/drm-don-t-block-fb-changes-for-async-plane-updates.patch
@@ -0,0 +1,138 @@
+From 89a4aac0ab0e6f5eea10d7bf4869dd15c3de2cd4 Mon Sep 17 00:00:00 2001
+From: Helen Koike <helen.koike@collabora.com>
+Date: Mon, 3 Jun 2019 13:56:10 -0300
+Subject: [PATCH] drm: don't block fb changes for async plane updates
+Git-commit: 89a4aac0ab0e6f5eea10d7bf4869dd15c3de2cd4
+Patch-mainline: v5.2-rc4
+References: bsc#1111666
+
+In the case of a normal sync update, the preparation of framebuffers (be
+it calling drm_atomic_helper_prepare_planes() or doing setups with
+drm_framebuffer_get()) are performed in the new_state and the respective
+cleanups are performed in the old_state.
+
+In the case of async updates, the preparation is also done in the
+new_state but the cleanups are done in the new_state (because updates
+are performed in place, i.e. in the current state).
+
+The current code blocks async udpates when the fb is changed, turning
+async updates into sync updates, slowing down cursor updates and
+introducing regressions in igt tests with errors of type:
+
+"critical: completed 97 cursor updated in a period of 30 flips, we
+expect to complete approximately 15360 updates, with the threshold set
+at 7680"
+
+Fb changes in async updates were prevented to avoid the following scenario:
+
+- Async update, oldfb = NULL, newfb = fb1, prepare fb1, cleanup fb1
+- Async update, oldfb = fb1, newfb = fb2, prepare fb2, cleanup fb2
+- Non-async commit, oldfb = fb2, newfb = fb1, prepare fb1, cleanup fb2 (wrong)
+Where we have a single call to prepare fb2 but double cleanup call to fb2.
+
+To solve the above problems, instead of blocking async fb changes, we
+place the old framebuffer in the new_state object, so when the code
+performs cleanups in the new_state it will cleanup the old_fb and we
+will have the following scenario instead:
+
+- Async update, oldfb = NULL, newfb = fb1, prepare fb1, no cleanup
+- Async update, oldfb = fb1, newfb = fb2, prepare fb2, cleanup fb1
+- Non-async commit, oldfb = fb2, newfb = fb1, prepare fb1, cleanup fb2
+
+Where calls to prepare/cleanup are balanced.
+
+Cc: <stable@vger.kernel.org> # v4.14+
+Fixes: 25dc194b34dd ("drm: Block fb changes for async plane updates")
+Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Helen Koike <helen.koike@collabora.com>
+Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190603165610.24614-6-helen.koike@collabora.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/drm_atomic_helper.c | 22 ++++++++++++----------
+ include/drm/drm_modeset_helper_vtables.h | 8 ++++++++
+ 2 files changed, 20 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
+index 2e0cb4246cbd..22a5c617f670 100644
+--- a/drivers/gpu/drm/drm_atomic_helper.c
++++ b/drivers/gpu/drm/drm_atomic_helper.c
+@@ -1607,15 +1607,6 @@ int drm_atomic_helper_async_check(struct drm_device *dev,
+ old_plane_state->crtc != new_plane_state->crtc)
+ return -EINVAL;
+
+- /*
+- * FIXME: Since prepare_fb and cleanup_fb are always called on
+- * the new_plane_state for async updates we need to block framebuffer
+- * changes. This prevents use of a fb that's been cleaned up and
+- * double cleanups from occuring.
+- */
+- if (old_plane_state->fb != new_plane_state->fb)
+- return -EINVAL;
+-
+ funcs = plane->helper_private;
+ if (!funcs->atomic_async_update)
+ return -EINVAL;
+@@ -1646,6 +1637,8 @@ EXPORT_SYMBOL(drm_atomic_helper_async_check);
+ * drm_atomic_async_check() succeeds. Async commits are not supposed to swap
+ * the states like normal sync commits, but just do in-place changes on the
+ * current state.
++ *
++ * TODO: Implement full swap instead of doing in-place changes.
+ */
+ void drm_atomic_helper_async_commit(struct drm_device *dev,
+ struct drm_atomic_state *state)
+@@ -1656,6 +1649,9 @@ void drm_atomic_helper_async_commit(struct drm_device *dev,
+ int i;
+
+ for_each_new_plane_in_state(state, plane, plane_state, i) {
++ struct drm_framebuffer *new_fb = plane_state->fb;
++ struct drm_framebuffer *old_fb = plane->state->fb;
++
+ funcs = plane->helper_private;
+ funcs->atomic_async_update(plane, plane_state);
+
+@@ -1664,11 +1660,17 @@ void drm_atomic_helper_async_commit(struct drm_device *dev,
+ * plane->state in-place, make sure at least common
+ * properties have been properly updated.
+ */
+- WARN_ON_ONCE(plane->state->fb != plane_state->fb);
++ WARN_ON_ONCE(plane->state->fb != new_fb);
+ WARN_ON_ONCE(plane->state->crtc_x != plane_state->crtc_x);
+ WARN_ON_ONCE(plane->state->crtc_y != plane_state->crtc_y);
+ WARN_ON_ONCE(plane->state->src_x != plane_state->src_x);
+ WARN_ON_ONCE(plane->state->src_y != plane_state->src_y);
++
++ /*
++ * Make sure the FBs have been swapped so that cleanups in the
++ * new_state performs a cleanup in the old FB.
++ */
++ WARN_ON_ONCE(plane_state->fb != old_fb);
+ }
+ }
+ EXPORT_SYMBOL(drm_atomic_helper_async_commit);
+diff --git a/include/drm/drm_modeset_helper_vtables.h b/include/drm/drm_modeset_helper_vtables.h
+index f9c94c2a1364..f7bbd0b0ecd1 100644
+--- a/include/drm/drm_modeset_helper_vtables.h
++++ b/include/drm/drm_modeset_helper_vtables.h
+@@ -1185,6 +1185,14 @@ struct drm_plane_helper_funcs {
+ * current one with the new plane configurations in the new
+ * plane_state.
+ *
++ * Drivers should also swap the framebuffers between current plane
++ * state (&drm_plane.state) and new_state.
++ * This is required since cleanup for async commits is performed on
++ * the new state, rather than old state like for traditional commits.
++ * Since we want to give up the reference on the current (old) fb
++ * instead of our brand new one, swap them in the driver during the
++ * async commit.
++ *
+ * FIXME:
+ * - It only works for single plane updates
+ * - Async Pageflips are not supported yet
+--
+2.16.4
+
diff --git a/patches.drm/drm-etnaviv-avoid-DMA-API-warning-when-importing-buf.patch b/patches.drm/drm-etnaviv-avoid-DMA-API-warning-when-importing-buf.patch
new file mode 100644
index 0000000000..e7a46d2b61
--- /dev/null
+++ b/patches.drm/drm-etnaviv-avoid-DMA-API-warning-when-importing-buf.patch
@@ -0,0 +1,95 @@
+From 1262cc8893ecb0eb2c21e042d0d268cc180edb61 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Mon, 25 Feb 2019 10:51:30 +0000
+Subject: [PATCH] drm: etnaviv: avoid DMA API warning when importing buffers
+Git-commit: 1262cc8893ecb0eb2c21e042d0d268cc180edb61
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+During boot, I get this kernel warning:
+
+Warning: CPU: 0 PID: 19001 at kernel/dma/debug.c:1301 debug_dma_map_sg+0x284/0x3dc
+etnaviv etnaviv: DMA-API: mapping sg segment longer than device claims to support [len=3145728] [max=65536]
+Modules linked in: ip6t_REJECT nf_reject_ipv6 ip6t_rpfilter xt_tcpudp ipt_REJECT nf_reject_ipv4 xt_conntrack ip_set nfnetlink ebtable_broute ebtable_nat ip6table_raw ip6table_nat nf_nat_ipv6 ip6table_mangle iptable_raw iptable_nat nf_nat_ipv4 nf_nat nf_conntrack nf_defrag_ipv4 nf_defrag_ipv6 libcrc32c iptable_mangle ebtable_filter ebtables ip6table_filter ip6_tables iptable_filter caam_jr error snd_soc_imx_spdif imx_thermal snd_soc_imx_audmux nvmem_imx_ocotp snd_soc_sgtl5000
+caam imx_sdma virt_dma coda rc_cec v4l2_mem2mem snd_soc_fsl_ssi snd_soc_fsl_spdif imx_vdoa imx_pcm_dma videobuf2_dma_contig etnaviv dw_hdmi_cec gpu_sched dw_hdmi_ahb_audio imx6q_cpufreq nfsd sch_fq_codel ip_tables x_tables
+Cpu: 0 PID: 19001 Comm: Xorg Not tainted 4.20.0+ #307
+Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
+[<c0019658>] (unwind_backtrace) from [<c001489c>] (show_stack+0x10/0x14)
+[<c001489c>] (show_stack) from [<c07fb420>] (dump_stack+0x9c/0xd4)
+[<c07fb420>] (dump_stack) from [<c00312dc>] (__warn+0xf8/0x124)
+[<c00312dc>] (__warn) from [<c00313d0>] (warn_slowpath_fmt+0x38/0x48)
+[<c00313d0>] (warn_slowpath_fmt) from [<c00b14e8>] (debug_dma_map_sg+0x284/0x3dc)
+[<c00b14e8>] (debug_dma_map_sg) from [<c046eb40>] (drm_gem_map_dma_buf+0xc4/0x13c)
+[<c046eb40>] (drm_gem_map_dma_buf) from [<c04c3314>] (dma_buf_map_attachment+0x38/0x5c)
+[<c04c3314>] (dma_buf_map_attachment) from [<c046e728>] (drm_gem_prime_import_dev+0x74/0x104)
+[<c046e728>] (drm_gem_prime_import_dev) from [<c046e5bc>] (drm_gem_prime_fd_to_handle+0x84/0x17c)
+[<c046e5bc>] (drm_gem_prime_fd_to_handle) from [<c046edd0>] (drm_prime_fd_to_handle_ioctl+0x38/0x4c)
+[<c046edd0>] (drm_prime_fd_to_handle_ioctl) from [<c0460efc>] (drm_ioctl_kernel+0x90/0xc8)
+[<c0460efc>] (drm_ioctl_kernel) from [<c0461114>] (drm_ioctl+0x1e0/0x3b0)
+[<c0461114>] (drm_ioctl) from [<c01cae20>] (do_vfs_ioctl+0x90/0xa48)
+[<c01cae20>] (do_vfs_ioctl) from [<c01cb80c>] (ksys_ioctl+0x34/0x60)
+[<c01cb80c>] (ksys_ioctl) from [<c0009000>] (ret_fast_syscall+0x0/0x28)
+Exception stack(0xd81a9fa8 to 0xd81a9ff0)
+9fa0: b6c69c88 bec613f8 00000009 c00c642e bec613f8 b86c4600
+9fc0: b6c69c88 bec613f8 c00c642e 00000036 012762e0 01276348 00000300 012d91f8
+9fe0: b6989f18 bec613dc b697185c b667be5c
+irq event stamp: 47905
+hardirqs last enabled at (47913): [<c0098824>] console_unlock+0x46c/0x680
+hardirqs last disabled at (47922): [<c0098470>] console_unlock+0xb8/0x680
+softirqs last enabled at (47754): [<c000a484>] __do_softirq+0x344/0x540
+softirqs last disabled at (47701): [<c0038700>] irq_exit+0x124/0x144
+
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---[ end trace af477747acbcc642 ]---
+
+The reason is the contiguous buffer exceeds the default maximum segment
+size of 64K as specified by dma_get_max_seg_size() in
+linux/dma-mapping.h. Fix this by providing our own segment size, which
+is set to 2GiB to cover the window found in MMUv1 GPUs.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
+---
+ drivers/gpu/drm/etnaviv/etnaviv_drv.c | 5 +++++
+ drivers/gpu/drm/etnaviv/etnaviv_drv.h | 1 +
+ 2 files changed, 6 insertions(+)
+
+diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+index 18c27f795cf6..3156450723ba 100644
+--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
++++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+@@ -515,6 +515,9 @@ static int etnaviv_bind(struct device *dev)
+ }
+ drm->dev_private = priv;
+
++ dev->dma_parms = &priv->dma_parms;
++ dma_set_max_seg_size(dev, SZ_2G);
++
+ mutex_init(&priv->gem_lock);
+ INIT_LIST_HEAD(&priv->gem_list);
+ priv->num_gpus = 0;
+@@ -552,6 +555,8 @@ static void etnaviv_unbind(struct device *dev)
+
+ component_unbind_all(dev, drm);
+
++ dev->dma_parms = NULL;
++
+ drm->dev_private = NULL;
+ kfree(priv);
+
+diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
+index a6a7ded37ef1..6a4ea127c4f1 100644
+--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h
++++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
+@@ -42,6 +42,7 @@ struct etnaviv_file_private {
+
+ struct etnaviv_drm_private {
+ int num_gpus;
++ struct device_dma_parameters dma_parms;
+ struct etnaviv_gpu *gpu[ETNA_MAX_PIPES];
+
+ /* list of GEM objects: */
+--
+2.16.4
+
diff --git a/patches.drm/drm-gma500-cdv-Check-vbt-config-bits-when-detecting-.patch b/patches.drm/drm-gma500-cdv-Check-vbt-config-bits-when-detecting-.patch
new file mode 100644
index 0000000000..f26efb2974
--- /dev/null
+++ b/patches.drm/drm-gma500-cdv-Check-vbt-config-bits-when-detecting-.patch
@@ -0,0 +1,68 @@
+From 7c420636860a719049fae9403e2c87804f53bdde Mon Sep 17 00:00:00 2001
+From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+Date: Tue, 16 Apr 2019 13:46:07 +0200
+Subject: [PATCH] drm/gma500/cdv: Check vbt config bits when detecting lvds panels
+Git-commit: 7c420636860a719049fae9403e2c87804f53bdde
+Patch-mainline: v5.2-rc2
+References: bsc#1051510
+
+Some machines have an lvds child device in vbt even though a panel is
+not attached. To make detection more reliable we now also check the lvds
+config bits available in the vbt.
+
+Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1665766
+Cc: stable@vger.kernel.org
+Reviewed-by: Hans de Goede <hdegoede@redhat.com>
+Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190416114607.1072-1-patrik.r.jakobsson@gmail.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/gma500/cdv_intel_lvds.c | 3 +++
+ drivers/gpu/drm/gma500/intel_bios.c | 3 +++
+ drivers/gpu/drm/gma500/psb_drv.h | 1 +
+ 3 files changed, 7 insertions(+)
+
+diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+index de9531caaca0..9c8446184b17 100644
+--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
++++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+@@ -594,6 +594,9 @@ void cdv_intel_lvds_init(struct drm_device *dev,
+ int pipe;
+ u8 pin;
+
++ if (!dev_priv->lvds_enabled_in_vbt)
++ return;
++
+ pin = GMBUS_PORT_PANEL;
+ if (!lvds_is_present_in_vbt(dev, &pin)) {
+ DRM_DEBUG_KMS("LVDS is not present in VBT\n");
+diff --git a/drivers/gpu/drm/gma500/intel_bios.c b/drivers/gpu/drm/gma500/intel_bios.c
+index 63bde4e86c6a..e019ea271ffc 100644
+--- a/drivers/gpu/drm/gma500/intel_bios.c
++++ b/drivers/gpu/drm/gma500/intel_bios.c
+@@ -436,6 +436,9 @@ parse_driver_features(struct drm_psb_private *dev_priv,
+ if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
+ dev_priv->edp.support = 1;
+
++ dev_priv->lvds_enabled_in_vbt = driver->lvds_config != 0;
++ DRM_DEBUG_KMS("LVDS VBT config bits: 0x%x\n", driver->lvds_config);
++
+ /* This bit means to use 96Mhz for DPLL_A or not */
+ if (driver->primary_lfp_id)
+ dev_priv->dplla_96mhz = true;
+diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
+index 941b238bdcc9..bc608ddc3bd1 100644
+--- a/drivers/gpu/drm/gma500/psb_drv.h
++++ b/drivers/gpu/drm/gma500/psb_drv.h
+@@ -537,6 +537,7 @@ struct drm_psb_private {
+ int lvds_ssc_freq;
+ bool is_lvds_on;
+ bool is_mipi_on;
++ bool lvds_enabled_in_vbt;
+ u32 mipi_ctrl_display;
+
+ unsigned int core_freq;
+--
+2.16.4
+
diff --git a/patches.drm/drm-i915-Maintain-consistent-documentation-subsectio.patch b/patches.drm/drm-i915-Maintain-consistent-documentation-subsectio.patch
new file mode 100644
index 0000000000..ff8260bd06
--- /dev/null
+++ b/patches.drm/drm-i915-Maintain-consistent-documentation-subsectio.patch
@@ -0,0 +1,92 @@
+From 551bd3368a7b3cfef01edaade8970948d178d40a Mon Sep 17 00:00:00 2001
+From: Jonathan Corbet <corbet@lwn.net>
+Date: Thu, 23 May 2019 10:06:46 -0600
+Subject: [PATCH] drm/i915: Maintain consistent documentation subsection ordering
+Git-commit: 551bd3368a7b3cfef01edaade8970948d178d40a
+Patch-mainline: v5.2-rc3
+References: bsc#1111666
+
+With Sphinx 2.0 (or prior versions with the deprecation warnings fixed) the
+docs build fails with:
+
+ Documentation/gpu/i915.rst:403: WARNING: Title level inconsistent:
+
+ Global GTT Fence Handling
+ ~~~~~~~~~~~~~~~~~~~~~~~~~
+
+ reST markup error:
+ Documentation/gpu/i915.rst:403: (SEVERE/4) Title level inconsistent:
+
+I "fixed" it by changing the subsections in i915.rst, but that didn't seem
+like the correct change. It turns out that a couple of i915 files create
+their own subsections in kerneldoc comments using apostrophes as the
+heading marker:
+
+ Layout
+ ''''''
+
+That breaks the normal subsection marker ordering, and newer Sphinx is
+rather more strict about enforcing that ordering. So fix the offending
+comments to make Sphinx happy.
+
+(This is unfortunate, in that kerneldoc comments shouldn't need to be aware
+of where they might be included in the heading hierarchy, but I don't see
+a better way around it).
+
+Cc: stable@vger.kernel.org # v4.14+
+Acked-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Jonathan Corbet <corbet@lwn.net>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h | 6 +++---
+ drivers/gpu/drm/i915/intel_workarounds.c | 2 +-
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
+index b74824f0b5b1..249d35c12a75 100644
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -35,7 +35,7 @@
+ * macros. Do **not** mass change existing definitions just to update the style.
+ *
+ * Layout
+- * ''''''
++ * ~~~~~~
+ *
+ * Keep helper macros near the top. For example, _PIPE() and friends.
+ *
+@@ -79,7 +79,7 @@
+ * style. Use lower case in hexadecimal values.
+ *
+ * Naming
+- * ''''''
++ * ~~~~~~
+ *
+ * Try to name registers according to the specs. If the register name changes in
+ * the specs from platform to another, stick to the original name.
+@@ -97,7 +97,7 @@
+ * suffix to the name. For example, ``_SKL`` or ``_GEN8``.
+ *
+ * Examples
+- * ''''''''
++ * ~~~~~~~~
+ *
+ * (Note that the values in the example are indented using spaces instead of
+ * TABs to avoid misalignment in generated documentation. Use TABs in the
+diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
+index 9682dd575152..6decd432f4d3 100644
+--- a/drivers/gpu/drm/i915/intel_workarounds.c
++++ b/drivers/gpu/drm/i915/intel_workarounds.c
+@@ -37,7 +37,7 @@
+ * costly and simplifies things. We can revisit this in the future.
+ *
+ * Layout
+- * ''''''
++ * ~~~~~~
+ *
+ * Keep things in this file ordered by WA type, as per the above (context, GT,
+ * display, register whitelist, batchbuffer). Then, inside each type, keep the
+--
+2.16.4
+
diff --git a/patches.drm/drm-i915-gvt-Initialize-intel_gvt_gtt_entry-in-stack.patch b/patches.drm/drm-i915-gvt-Initialize-intel_gvt_gtt_entry-in-stack.patch
new file mode 100644
index 0000000000..ae0b11f221
--- /dev/null
+++ b/patches.drm/drm-i915-gvt-Initialize-intel_gvt_gtt_entry-in-stack.patch
@@ -0,0 +1,63 @@
+From 387a4c2b55291b37e245c840813bd8a8bd06ed49 Mon Sep 17 00:00:00 2001
+From: Tina Zhang <tina.zhang@intel.com>
+Date: Thu, 23 May 2019 06:18:36 +0800
+Subject: [PATCH] drm/i915/gvt: Initialize intel_gvt_gtt_entry in stack
+Git-commit: 387a4c2b55291b37e245c840813bd8a8bd06ed49
+Patch-mainline: v5.2-rc4
+References: bsc#1111666
+
+Stack struct intel_gvt_gtt_entry value needs to be initialized before
+being used, as the fields may contain garbage values.
+
+W/o this patch, set_ggtt_entry prints:
+
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+-------------------------------------
+274.046840: set_ggtt_entry: vgpu1:set ggtt entry 0x9bed8000ffffe900
+274.046846: set_ggtt_entry: vgpu1:set ggtt entry 0xe55df001
+274.046852: set_ggtt_entry: vgpu1:set ggtt entry 0x9bed8000ffffe900
+
+0x9bed8000 is the stack grabage.
+
+W/ this patch, set_ggtt_entry prints:
+------------------------------------
+274.046840: set_ggtt_entry: vgpu1:set ggtt entry 0xffffe900
+274.046846: set_ggtt_entry: vgpu1:set ggtt entry 0xe55df001
+274.046852: set_ggtt_entry: vgpu1:set ggtt entry 0xffffe900
+
+v2:
+- Initialize during declaration. (Zhenyu)
+
+Fixes: 7598e8700e9a ("drm/i915/gvt: Missed to cancel dma map for ggtt entries")
+Cc: stable@vger.kernel.org # v4.20+
+Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
+Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Signed-off-by: Tina Zhang <tina.zhang@intel.com>
+Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+---
+ drivers/gpu/drm/i915/gvt/gtt.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gvt/gtt.c
++++ b/drivers/gpu/drm/i915/gvt/gtt.c
+@@ -2172,7 +2172,8 @@ static int emulate_ggtt_mmio_write(struc
+ struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
+ unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;
+ unsigned long gma, gfn;
+- struct intel_gvt_gtt_entry e, m;
++ struct intel_gvt_gtt_entry e = {.val64 = 0, .type = GTT_TYPE_GGTT_PTE};
++ struct intel_gvt_gtt_entry m = {.val64 = 0, .type = GTT_TYPE_GGTT_PTE};
+ dma_addr_t dma_addr;
+ int ret;
+
+@@ -2248,7 +2249,8 @@ static int emulate_ggtt_mmio_write(struc
+
+ if (ops->test_present(&e)) {
+ gfn = ops->get_pfn(&e);
+- m = e;
++ m.val64 = e.val64;
++ m.type = e.type;
+
+ /* one PTE update may be issued in multiple writes and the
+ * first write may not construct a valid gfn
diff --git a/patches.drm/drm-lease-Make-sure-implicit-planes-are-leased.patch b/patches.drm/drm-lease-Make-sure-implicit-planes-are-leased.patch
new file mode 100644
index 0000000000..f189f56d7f
--- /dev/null
+++ b/patches.drm/drm-lease-Make-sure-implicit-planes-are-leased.patch
@@ -0,0 +1,67 @@
+From 204f640da6914844b3270b41b29c84f6e3b74083 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Thu, 28 Feb 2019 15:49:08 +0100
+Subject: [PATCH] drm/lease: Make sure implicit planes are leased
+Git-commit: 204f640da6914844b3270b41b29c84f6e3b74083
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+If userspace doesn't enable universal planes, then we automatically
+add the primary and cursor planes. But for universal userspace there's
+no such check (and maybe we only want to give the lessee one plane,
+maybe not even the primary one), hence we need to check for the
+implied plane.
+
+V2: don't forget setcrtc ioctl.
+
+V3: Still allow disabling of the crtc in SETCRTC.
+
+Cc: stable@vger.kernel.org
+Cc: Keith Packard <keithp@keithp.com>
+Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190228144910.26488-6-daniel.vetter@ffwll.ch
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/drm_crtc.c | 4 ++++
+ drivers/gpu/drm/drm_plane.c | 8 ++++++++
+ 2 files changed, 12 insertions(+)
+
+--- a/drivers/gpu/drm/drm_crtc.c
++++ b/drivers/gpu/drm/drm_crtc.c
+@@ -595,6 +595,10 @@ int drm_mode_setcrtc(struct drm_device *
+
+ plane = crtc->primary;
+
++ /* allow disabling with the primary plane leased */
++ if (crtc_req->mode_valid && !drm_lease_held(file_priv, plane->base.id))
++ return -EACCES;
++
+ mutex_lock(&crtc->dev->mode_config.mutex);
+ drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
+ retry:
+--- a/drivers/gpu/drm/drm_plane.c
++++ b/drivers/gpu/drm/drm_plane.c
+@@ -940,6 +940,11 @@ retry:
+ if (ret)
+ goto out;
+
++ if (!drm_lease_held(file_priv, crtc->cursor->base.id)) {
++ ret = -EACCES;
++ goto out;
++ }
++
+ ret = drm_mode_cursor_universal(crtc, req, file_priv, &ctx);
+ goto out;
+ }
+@@ -1042,6 +1047,9 @@ int drm_mode_page_flip_ioctl(struct drm_
+
+ plane = crtc->primary;
+
++ if (!drm_lease_held(file_priv, plane->base.id))
++ return -EACCES;
++
+ if (crtc->funcs->page_flip_target) {
+ u32 current_vblank;
+ int r;
diff --git a/patches.drm/drm-msm-a5xx-fix-possible-object-reference-leak.patch b/patches.drm/drm-msm-a5xx-fix-possible-object-reference-leak.patch
new file mode 100644
index 0000000000..3a7a57542c
--- /dev/null
+++ b/patches.drm/drm-msm-a5xx-fix-possible-object-reference-leak.patch
@@ -0,0 +1,75 @@
+From 6cd5235c3135ea84b32469ea51b2aae384eda8af Mon Sep 17 00:00:00 2001
+From: Wen Yang <wen.yang99@zte.com.cn>
+Date: Thu, 4 Apr 2019 00:04:11 +0800
+Subject: [PATCH] drm/msm: a5xx: fix possible object reference leak
+Git-commit: 6cd5235c3135ea84b32469ea51b2aae384eda8af
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+The call to of_get_child_by_name returns a node pointer with refcount
+incremented thus it must be explicitly decremented after the last
+usage.
+
+Detected by coccinelle with the following warnings:
+drivers/gpu/drm/msm/adreno/a5xx_gpu.c:57:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 47, but without a corresponding object release within this function.
+drivers/gpu/drm/msm/adreno/a5xx_gpu.c:66:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 47, but without a corresponding object release within this function.
+drivers/gpu/drm/msm/adreno/a5xx_gpu.c:118:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 47, but without a corresponding object release within this function.
+drivers/gpu/drm/msm/adreno/a5xx_gpu.c:57:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 51, but without a corresponding object release within this function.
+drivers/gpu/drm/msm/adreno/a5xx_gpu.c:66:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 51, but without a corresponding object release within this function.
+drivers/gpu/drm/msm/adreno/a5xx_gpu.c:118:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 51, but without a corresponding object release within this function.
+
+Signed-off-by: Wen Yang <wen.yang99@zte.com.cn>
+Cc: Rob Clark <robdclark@gmail.com>
+Cc: Sean Paul <sean@poorly.run>
+Cc: David Airlie <airlied@linux.ie>
+Cc: Daniel Vetter <daniel@ffwll.ch>
+Cc: Jordan Crouse <jcrouse@codeaurora.org>
+Cc: Mamta Shukla <mamtashukla555@gmail.com>
+Cc: Thomas Zimmermann <tzimmermann@suse.de>
+Cc: Sharat Masetty <smasetty@codeaurora.org>
+Cc: linux-arm-msm@vger.kernel.org
+Cc: dri-devel@lists.freedesktop.org
+Cc: freedreno@lists.freedesktop.org
+Cc: linux-kernel@vger.kernel.org (open list)
+Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
+Signed-off-by: Rob Clark <robdclark@gmail.com>
+Signed-off-by: Rob Clark <robdclark@chromium.org>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 10 ++++++----
+ 1 file changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+index d5f5e56422f5..270da14cba67 100644
+--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
++++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+@@ -34,7 +34,7 @@ static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname)
+ {
+ struct device *dev = &gpu->pdev->dev;
+ const struct firmware *fw;
+- struct device_node *np;
++ struct device_node *np, *mem_np;
+ struct resource r;
+ phys_addr_t mem_phys;
+ ssize_t mem_size;
+@@ -48,11 +48,13 @@ static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname)
+ if (!np)
+ return -ENODEV;
+
+- np = of_parse_phandle(np, "memory-region", 0);
+- if (!np)
++ mem_np = of_parse_phandle(np, "memory-region", 0);
++ of_node_put(np);
++ if (!mem_np)
+ return -EINVAL;
+
+- ret = of_address_to_resource(np, 0, &r);
++ ret = of_address_to_resource(mem_np, 0, &r);
++ of_node_put(mem_np);
+ if (ret)
+ return ret;
+
+--
+2.16.4
+
diff --git a/patches.drm/drm-msm-fix-fb-references-in-async-update.patch b/patches.drm/drm-msm-fix-fb-references-in-async-update.patch
new file mode 100644
index 0000000000..14b1452686
--- /dev/null
+++ b/patches.drm/drm-msm-fix-fb-references-in-async-update.patch
@@ -0,0 +1,49 @@
+From 474d952b4870cfbdc55d3498f4d498775fe77e81 Mon Sep 17 00:00:00 2001
+From: Helen Koike <helen.koike@collabora.com>
+Date: Mon, 3 Jun 2019 13:56:08 -0300
+Subject: [PATCH] drm/msm: fix fb references in async update
+Git-commit: 474d952b4870cfbdc55d3498f4d498775fe77e81
+Patch-mainline: v5.2-rc4
+References: bsc#1111666
+
+Async update callbacks are expected to set the old_fb in the new_state
+so prepare/cleanup framebuffers are balanced.
+
+Cc: <stable@vger.kernel.org> # v4.14+
+Fixes: 224a4c970987 ("drm/msm: update cursors asynchronously through atomic")
+Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Helen Koike <helen.koike@collabora.com>
+Acked-by: Rob Clark <robdclark@gmail.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190603165610.24614-4-helen.koike@collabora.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
+index be13140967b4..b854f471e9e5 100644
+--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
++++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
+@@ -502,6 +502,8 @@ static int mdp5_plane_atomic_async_check(struct drm_plane *plane,
+ static void mdp5_plane_atomic_async_update(struct drm_plane *plane,
+ struct drm_plane_state *new_state)
+ {
++ struct drm_framebuffer *old_fb = plane->state->fb;
++
+ plane->state->src_x = new_state->src_x;
+ plane->state->src_y = new_state->src_y;
+ plane->state->crtc_x = new_state->crtc_x;
+@@ -524,6 +526,8 @@ static void mdp5_plane_atomic_async_update(struct drm_plane *plane,
+
+ *to_mdp5_plane_state(plane->state) =
+ *to_mdp5_plane_state(new_state);
++
++ new_state->fb = old_fb;
+ }
+
+ static const struct drm_plane_helper_funcs mdp5_plane_helper_funcs = {
+--
+2.16.4
+
diff --git a/patches.drm/drm-nouveau-bar-nv50-ensure-BAR-is-mapped.patch b/patches.drm/drm-nouveau-bar-nv50-ensure-BAR-is-mapped.patch
new file mode 100644
index 0000000000..cf3466351d
--- /dev/null
+++ b/patches.drm/drm-nouveau-bar-nv50-ensure-BAR-is-mapped.patch
@@ -0,0 +1,60 @@
+From f10b83de1fd49216a4c657816f48001437e4bdd5 Mon Sep 17 00:00:00 2001
+From: Jon Derrick <jonathan.derrick@intel.com>
+Date: Fri, 15 Mar 2019 18:05:16 -0600
+Subject: [PATCH] drm/nouveau/bar/nv50: ensure BAR is mapped
+Git-commit: f10b83de1fd49216a4c657816f48001437e4bdd5
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+If the BAR is zero size, it indicates it was never successfully mapped.
+Ensure that the BAR is valid during initialization before attempting to
+use it.
+
+Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c | 12 +++++++++---
+ 1 file changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
+index 8e64b19f3f8a..f23a0ccc2bec 100644
+--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
+@@ -109,7 +109,7 @@ nv50_bar_oneinit(struct nvkm_bar *base)
+ struct nvkm_device *device = bar->base.subdev.device;
+ static struct lock_class_key bar1_lock;
+ static struct lock_class_key bar2_lock;
+- u64 start, limit;
++ u64 start, limit, size;
+ int ret;
+
+ ret = nvkm_gpuobj_new(device, 0x20000, 0, false, NULL, &bar->mem);
+@@ -127,7 +127,10 @@ nv50_bar_oneinit(struct nvkm_bar *base)
+
+ /* BAR2 */
+ start = 0x0100000000ULL;
+- limit = start + device->func->resource_size(device, 3);
++ size = device->func->resource_size(device, 3);
++ if (!size)
++ return -ENOMEM;
++ limit = start + size;
+
+ ret = nvkm_vmm_new(device, start, limit-- - start, NULL, 0,
+ &bar2_lock, "bar2", &bar->bar2_vmm);
+@@ -164,7 +167,10 @@ nv50_bar_oneinit(struct nvkm_bar *base)
+
+ /* BAR1 */
+ start = 0x0000000000ULL;
+- limit = start + device->func->resource_size(device, 1);
++ size = device->func->resource_size(device, 1);
++ if (!size)
++ return -ENOMEM;
++ limit = start + size;
+
+ ret = nvkm_vmm_new(device, start, limit-- - start, NULL, 0,
+ &bar1_lock, "bar1", &bar->bar1_vmm);
+--
+2.16.4
+
diff --git a/patches.drm/drm-omap-dsi-Fix-PM-for-display-blank-with-paired-ds.patch b/patches.drm/drm-omap-dsi-Fix-PM-for-display-blank-with-paired-ds.patch
new file mode 100644
index 0000000000..4202a58e39
--- /dev/null
+++ b/patches.drm/drm-omap-dsi-Fix-PM-for-display-blank-with-paired-ds.patch
@@ -0,0 +1,164 @@
+From fe4ed1b457943113ee1138c939fbdeede4af6cf3 Mon Sep 17 00:00:00 2001
+From: Tony Lindgren <tony@atomide.com>
+Date: Thu, 7 Feb 2019 07:45:16 -0800
+Subject: [PATCH] drm/omap: dsi: Fix PM for display blank with paired dss_pll calls
+Git-commit: fe4ed1b457943113ee1138c939fbdeede4af6cf3
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Currently dsi_display_init_dsi() calls dss_pll_enable() but it is not
+paired with dss_pll_disable() in dsi_display_uninit_dsi(). This leaves
+the DSS clocks enabled when the display is blanked wasting about extra
+5mW of power while idle.
+
+The clock that is left on by not calling dss_pll_disable() is
+DSS_CLKCTRL bit 10 OPTFCLKEN_SYS_CLK that is the source clock for
+DSI PLL.
+
+We can fix this issue by by making the current dsi_pll_uninit() into
+dsi_pll_disable(). This way we can just call dss_pll_disable() from
+dsi_display_uninit_dsi() and the code becomes a bit easier to follow.
+
+However, we need to also consider that DSI PLL can be muxed for DVI too
+as pointed out by Tomi Valkeinen <tomi.valkeinen@ti.com>. In the DVI
+case, we want to unconditionally disable the clocks. To get around this
+issue, we separate out the DSI lane handling from dsi_pll_enable() and
+dsi_pll_disable() as suggested by Tomi in an earlier experimental patch.
+
+So we must only toggle the DSI regulator based on the vdds_dsi_enabled
+flag from dsi_display_init_dsi() and dsi_display_uninit_dsi().
+
+We need to make these two changes together to avoid breaking things
+for DVI when fixing the DSI clock handling. And this all causes a
+slight renumbering of the error path for dsi_display_init_dsi().
+
+Suggested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/omapdrm/dss/dsi.c | 60 +++++++++++++++++++-------------------
+ 1 file changed, 31 insertions(+), 29 deletions(-)
+
+--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
++++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
+@@ -1386,12 +1386,9 @@ static int dsi_pll_enable(struct dss_pll
+ */
+ dsi_enable_scp_clk(dsi);
+
+- if (!dsi->vdds_dsi_enabled) {
+- r = regulator_enable(dsi->vdds_dsi_reg);
+- if (r)
+- goto err0;
+- dsi->vdds_dsi_enabled = true;
+- }
++ r = regulator_enable(dsi->vdds_dsi_reg);
++ if (r)
++ goto err0;
+
+ /* XXX PLL does not come out of reset without this... */
+ dispc_pck_free_enable(dsi->dss->dispc, 1);
+@@ -1416,36 +1413,25 @@ static int dsi_pll_enable(struct dss_pll
+
+ return 0;
+ err1:
+- if (dsi->vdds_dsi_enabled) {
+- regulator_disable(dsi->vdds_dsi_reg);
+- dsi->vdds_dsi_enabled = false;
+- }
++ regulator_disable(dsi->vdds_dsi_reg);
+ err0:
+ dsi_disable_scp_clk(dsi);
+ dsi_runtime_put(dsi);
+ return r;
+ }
+
+-static void dsi_pll_uninit(struct dsi_data *dsi, bool disconnect_lanes)
++static void dsi_pll_disable(struct dss_pll *pll)
+ {
++ struct dsi_data *dsi = container_of(pll, struct dsi_data, pll);
++
+ dsi_pll_power(dsi, DSI_PLL_POWER_OFF);
+- if (disconnect_lanes) {
+- WARN_ON(!dsi->vdds_dsi_enabled);
+- regulator_disable(dsi->vdds_dsi_reg);
+- dsi->vdds_dsi_enabled = false;
+- }
++
++ regulator_disable(dsi->vdds_dsi_reg);
+
+ dsi_disable_scp_clk(dsi);
+ dsi_runtime_put(dsi);
+
+- DSSDBG("PLL uninit done\n");
+-}
+-
+-static void dsi_pll_disable(struct dss_pll *pll)
+-{
+- struct dsi_data *dsi = container_of(pll, struct dsi_data, pll);
+-
+- dsi_pll_uninit(dsi, true);
++ DSSDBG("PLL disable done\n");
+ }
+
+ static void dsi_dump_dsi_clocks(struct dsi_data *dsi, struct seq_file *s)
+@@ -4195,11 +4181,11 @@ static int dsi_display_init_dsi(struct d
+
+ r = dss_pll_enable(&dsi->pll);
+ if (r)
+- goto err0;
++ return r;
+
+ r = dsi_configure_dsi_clocks(dsi);
+ if (r)
+- goto err1;
++ goto err0;
+
+ dss_select_dsi_clk_source(dsi->dss, dsi->module_id,
+ dsi->module_id == 0 ?
+@@ -4207,6 +4193,14 @@ static int dsi_display_init_dsi(struct d
+
+ DSSDBG("PLL OK\n");
+
++ if (!dsi->vdds_dsi_enabled) {
++ r = regulator_enable(dsi->vdds_dsi_reg);
++ if (r)
++ goto err1;
++
++ dsi->vdds_dsi_enabled = true;
++ }
++
+ r = dsi_cio_init(dsi);
+ if (r)
+ goto err2;
+@@ -4235,10 +4229,13 @@ static int dsi_display_init_dsi(struct d
+ err3:
+ dsi_cio_uninit(dsi);
+ err2:
+- dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK);
++ regulator_disable(dsi->vdds_dsi_reg);
++ dsi->vdds_dsi_enabled = false;
+ err1:
+- dss_pll_disable(&dsi->pll);
++ dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK);
+ err0:
++ dss_pll_disable(&dsi->pll);
++
+ return r;
+ }
+
+@@ -4257,7 +4254,12 @@ static void dsi_display_uninit_dsi(struc
+
+ dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK);
+ dsi_cio_uninit(dsi);
+- dsi_pll_uninit(dsi, disconnect_lanes);
++ dss_pll_disable(&dsi->pll);
++
++ if (disconnect_lanes) {
++ regulator_disable(dsi->vdds_dsi_reg);
++ dsi->vdds_dsi_enabled = false;
++ }
+ }
+
+ static int dsi_display_enable(struct omap_dss_device *dssdev)
diff --git a/patches.drm/drm-panel-otm8009a-Add-delay-at-the-end-of-initializ.patch b/patches.drm/drm-panel-otm8009a-Add-delay-at-the-end-of-initializ.patch
new file mode 100644
index 0000000000..b85b009ad7
--- /dev/null
+++ b/patches.drm/drm-panel-otm8009a-Add-delay-at-the-end-of-initializ.patch
@@ -0,0 +1,43 @@
+From 0084c3c71126fc878c6dab8a6ab8ecc484c2be02 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Yannick=20Fertr=C3=A9?= <yannick.fertre@st.com>
+Date: Thu, 21 Mar 2019 09:04:05 +0100
+Subject: [PATCH] drm/panel: otm8009a: Add delay at the end of initialization
+Mime-version: 1.0
+Content-type: text/plain; charset=UTF-8
+Content-transfer-encoding: 8bit
+Git-commit: 0084c3c71126fc878c6dab8a6ab8ecc484c2be02
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+At the end of initialization, a delay is required by the panel. Without
+this delay, the panel could received a frame early & generate a crash of
+panel (black screen).
+
+Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
+Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
+Tested-by: Philippe Cornu <philippe.cornu@st.com>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/1553155445-13407-1-git-send-email-yannick.fertre@st.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
+index 87fa316e1d7b..58ccf648b70f 100644
+--- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
++++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
+@@ -248,6 +248,9 @@ static int otm8009a_init_sequence(struct otm8009a *ctx)
+ /* Send Command GRAM memory write (no parameters) */
+ dcs_write_seq(ctx, MIPI_DCS_WRITE_MEMORY_START);
+
++ /* Wait a short while to let the panel be ready before the 1st frame */
++ mdelay(10);
++
+ return 0;
+ }
+
+--
+2.16.4
+
diff --git a/patches.drm/drm-pl111-fix-possible-object-reference-leak.patch b/patches.drm/drm-pl111-fix-possible-object-reference-leak.patch
new file mode 100644
index 0000000000..16ad8b9969
--- /dev/null
+++ b/patches.drm/drm-pl111-fix-possible-object-reference-leak.patch
@@ -0,0 +1,70 @@
+From bc29d3a69d4c1bd1a103e8b3c1ed81b807c1870b Mon Sep 17 00:00:00 2001
+From: Wen Yang <wen.yang99@zte.com.cn>
+Date: Thu, 4 Apr 2019 00:04:13 +0800
+Subject: [PATCH] drm/pl111: fix possible object reference leak
+Git-commit: bc29d3a69d4c1bd1a103e8b3c1ed81b807c1870b
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+The call to of_find_matching_node_and_match returns a node pointer with
+refcount incremented thus it must be explicitly decremented after the
+last usage.
+
+Detected by coccinelle with the following warnings:
+drivers/gpu/drm/pl111/pl111_versatile.c:333:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function.
+drivers/gpu/drm/pl111/pl111_versatile.c:340:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function.
+drivers/gpu/drm/pl111/pl111_versatile.c:346:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function.
+drivers/gpu/drm/pl111/pl111_versatile.c:354:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function.
+drivers/gpu/drm/pl111/pl111_versatile.c:395:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function.
+drivers/gpu/drm/pl111/pl111_versatile.c:402:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function.
+
+Signed-off-by: Wen Yang <wen.yang99@zte.com.cn>
+Cc: Eric Anholt <eric@anholt.net> (supporter:DRM DRIVER FOR ARM PL111 CLCD)
+Cc: David Airlie <airlied@linux.ie> (maintainer:DRM DRIVERS)
+Cc: Daniel Vetter <daniel@ffwll.ch> (maintainer:DRM DRIVERS)
+Cc: dri-devel@lists.freedesktop.org (open list:DRM DRIVERS)
+Cc: linux-kernel@vger.kernel.org (open list)
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Link: https://patchwork.freedesktop.org/patch/msgid/1554307455-40361-6-git-send-email-wen.yang99@zte.com.cn
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/pl111/pl111_versatile.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c
+index b9baefdba38a..1c318ad32a8c 100644
+--- a/drivers/gpu/drm/pl111/pl111_versatile.c
++++ b/drivers/gpu/drm/pl111/pl111_versatile.c
+@@ -330,6 +330,7 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv)
+ ret = vexpress_muxfpga_init();
+ if (ret) {
+ dev_err(dev, "unable to initialize muxfpga driver\n");
++ of_node_put(np);
+ return ret;
+ }
+
+@@ -337,17 +338,20 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv)
+ pdev = of_find_device_by_node(np);
+ if (!pdev) {
+ dev_err(dev, "can't find the sysreg device, deferring\n");
++ of_node_put(np);
+ return -EPROBE_DEFER;
+ }
+ map = dev_get_drvdata(&pdev->dev);
+ if (!map) {
+ dev_err(dev, "sysreg has not yet probed\n");
+ platform_device_put(pdev);
++ of_node_put(np);
+ return -EPROBE_DEFER;
+ }
+ } else {
+ map = syscon_node_to_regmap(np);
+ }
++ of_node_put(np);
+
+ if (IS_ERR(map)) {
+ dev_err(dev, "no Versatile syscon regmap\n");
+--
+2.16.4
+
diff --git a/patches.drm/drm-radeon-prefer-lower-reference-dividers.patch b/patches.drm/drm-radeon-prefer-lower-reference-dividers.patch
new file mode 100644
index 0000000000..f108f51437
--- /dev/null
+++ b/patches.drm/drm-radeon-prefer-lower-reference-dividers.patch
@@ -0,0 +1,48 @@
+From 2e26ccb119bde03584be53406bbd22e711b0d6e6 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Mon, 6 May 2019 19:57:52 +0200
+Subject: [PATCH] drm/radeon: prefer lower reference dividers
+Mime-version: 1.0
+Content-type: text/plain; charset=UTF-8
+Content-transfer-encoding: 8bit
+Git-commit: 2e26ccb119bde03584be53406bbd22e711b0d6e6
+Patch-mainline: v5.2-rc1
+References: bsc#1051510
+
+Instead of the closest reference divider prefer the lowest,
+this fixes flickering issues on HP Compaq nx9420.
+
+Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=108514
+Suggested-by: Paul Dufresne <dufresnep@gmail.com>
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_display.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
+index aa898c699101..433df7036f96 100644
+--- a/drivers/gpu/drm/radeon/radeon_display.c
++++ b/drivers/gpu/drm/radeon/radeon_display.c
+@@ -922,12 +922,12 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div,
+ ref_div_max = max(min(100 / post_div, ref_div_max), 1u);
+
+ /* get matching reference and feedback divider */
+- *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
++ *ref_div = min(max(den/post_div, 1u), ref_div_max);
+ *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
+
+ /* limit fb divider to its maximum */
+ if (*fb_div > fb_div_max) {
+- *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);
++ *ref_div = (*ref_div * fb_div_max)/(*fb_div);
+ *fb_div = fb_div_max;
+ }
+ }
+--
+2.16.4
+
diff --git a/patches.drm/drm-sun4i-dsi-Change-the-start-delay-calculation.patch b/patches.drm/drm-sun4i-dsi-Change-the-start-delay-calculation.patch
new file mode 100644
index 0000000000..905900cf77
--- /dev/null
+++ b/patches.drm/drm-sun4i-dsi-Change-the-start-delay-calculation.patch
@@ -0,0 +1,48 @@
+From da676c6aa6413d59ab0a80c97bbc273025e640b2 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@bootlin.com>
+Date: Mon, 11 Feb 2019 15:41:23 +0100
+Subject: [PATCH] drm/sun4i: dsi: Change the start delay calculation
+Git-commit: da676c6aa6413d59ab0a80c97bbc273025e640b2
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+The current calculation for the video start delay in the current DSI driver
+is that it is the total vertical size, minus the front porch and sync length,
+plus 1. This equals to the active vertical size plus the back porch plus 1.
+
+That 1 is coming in the Allwinner BSP from an variable that is set to 1.
+However, if we look at the Allwinner BSP more closely, and especially in
+the "legacy" code for the display (in drivers/video/sunxi/legacy/), we can
+see that this variable is actually computed from the porches and the sync
+minus 10, clamped between 8 and 100.
+
+This fixes the start delay symptom we've seen on some panels (vblank
+timeouts with vertical white stripes at the bottom of the panel).
+
+Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/6e5f72e68f47ca0223877464bf12f0c3f3978de8.1549896081.git-series.maxime.ripard@bootlin.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+index 318994cd1b85..25d8cb9f9266 100644
+--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
++++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+@@ -358,7 +358,9 @@ static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi,
+ static u16 sun6i_dsi_get_video_start_delay(struct sun6i_dsi *dsi,
+ struct drm_display_mode *mode)
+ {
+- return mode->vtotal - (mode->vsync_end - mode->vdisplay) + 1;
++ u16 start = clamp(mode->vtotal - mode->vdisplay - 10, 8, 100);
++
++ return mode->vtotal - (mode->vsync_end - mode->vdisplay) + start;
+ }
+
+ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
+--
+2.16.4
+
diff --git a/patches.drm/drm-sun4i-dsi-Enforce-boundaries-on-the-start-delay.patch b/patches.drm/drm-sun4i-dsi-Enforce-boundaries-on-the-start-delay.patch
new file mode 100644
index 0000000000..244eb768b1
--- /dev/null
+++ b/patches.drm/drm-sun4i-dsi-Enforce-boundaries-on-the-start-delay.patch
@@ -0,0 +1,44 @@
+From efa31801203ac2f5c6a82a28cb991c7163ee0f1d Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@bootlin.com>
+Date: Mon, 11 Feb 2019 15:41:24 +0100
+Subject: [PATCH] drm/sun4i: dsi: Enforce boundaries on the start delay
+Git-commit: efa31801203ac2f5c6a82a28cb991c7163ee0f1d
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+The Allwinner BSP makes sure that we don't end up with a null start delay
+or with a delay larger than vtotal.
+
+The former condition is likely to happen now with the reworked start delay,
+so make sure we enforce the same boundaries.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/c9889cf5f7a3d101ef380905900b45a182596f56.1549896081.git-series.maxime.ripard@bootlin.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+index 25d8cb9f9266..869e0aedf343 100644
+--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
++++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+@@ -359,8 +359,12 @@ static u16 sun6i_dsi_get_video_start_delay(struct sun6i_dsi *dsi,
+ struct drm_display_mode *mode)
+ {
+ u16 start = clamp(mode->vtotal - mode->vdisplay - 10, 8, 100);
++ u16 delay = mode->vtotal - (mode->vsync_end - mode->vdisplay) + start;
+
+- return mode->vtotal - (mode->vsync_end - mode->vdisplay) + start;
++ if (delay > mode->vtotal)
++ delay = delay % mode->vtotal;
++
++ return max_t(u16, delay, 1);
+ }
+
+ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
+--
+2.16.4
+
diff --git a/patches.drm/drm-v3d-Handle-errors-from-IRQ-setup.patch b/patches.drm/drm-v3d-Handle-errors-from-IRQ-setup.patch
new file mode 100644
index 0000000000..05bcea96e6
--- /dev/null
+++ b/patches.drm/drm-v3d-Handle-errors-from-IRQ-setup.patch
@@ -0,0 +1,99 @@
+From fc22771547e7e8a63679f0218e943d72b107de65 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 8 Mar 2019 09:43:35 -0800
+Subject: [PATCH] drm/v3d: Handle errors from IRQ setup.
+Git-commit: fc22771547e7e8a63679f0218e943d72b107de65
+Patch-mainline: v5.2-rc1
+References: bsc#1111666
+
+Noted in review by Dave Emett for V3D 4.2 support.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190308174336.7866-1-eric@anholt.net
+Reviewed-by: Dave Emett <david.emett@broadcom.com>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/gpu/drm/v3d/v3d_drv.c | 8 ++++++--
+ drivers/gpu/drm/v3d/v3d_drv.h | 2 +-
+ drivers/gpu/drm/v3d/v3d_irq.c | 13 +++++++++++--
+ 3 files changed, 18 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c
+index 3680ebd229f2..f9906cac7a88 100644
+--- a/drivers/gpu/drm/v3d/v3d_drv.c
++++ b/drivers/gpu/drm/v3d/v3d_drv.c
+@@ -311,14 +311,18 @@ static int v3d_platform_drm_probe(struct platform_device *pdev)
+ if (ret)
+ goto dev_destroy;
+
+- v3d_irq_init(v3d);
++ ret = v3d_irq_init(v3d);
++ if (ret)
++ goto gem_destroy;
+
+ ret = drm_dev_register(drm, 0);
+ if (ret)
+- goto gem_destroy;
++ goto irq_disable;
+
+ return 0;
+
++irq_disable:
++ v3d_irq_disable(v3d);
+ gem_destroy:
+ v3d_gem_destroy(drm);
+ dev_destroy:
+diff --git a/drivers/gpu/drm/v3d/v3d_drv.h b/drivers/gpu/drm/v3d/v3d_drv.h
+index d856159bd007..bb58ecb9d9c5 100644
+--- a/drivers/gpu/drm/v3d/v3d_drv.h
++++ b/drivers/gpu/drm/v3d/v3d_drv.h
+@@ -304,7 +304,7 @@ void v3d_reset(struct v3d_dev *v3d);
+ void v3d_invalidate_caches(struct v3d_dev *v3d);
+
+ /* v3d_irq.c */
+-void v3d_irq_init(struct v3d_dev *v3d);
++int v3d_irq_init(struct v3d_dev *v3d);
+ void v3d_irq_enable(struct v3d_dev *v3d);
+ void v3d_irq_disable(struct v3d_dev *v3d);
+ void v3d_irq_reset(struct v3d_dev *v3d);
+diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
+index 69338da70ddc..29d746cfce57 100644
+--- a/drivers/gpu/drm/v3d/v3d_irq.c
++++ b/drivers/gpu/drm/v3d/v3d_irq.c
+@@ -156,7 +156,7 @@ v3d_hub_irq(int irq, void *arg)
+ return status;
+ }
+
+-void
++int
+ v3d_irq_init(struct v3d_dev *v3d)
+ {
+ int ret, core;
+@@ -173,13 +173,22 @@ v3d_irq_init(struct v3d_dev *v3d)
+ ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0),
+ v3d_hub_irq, IRQF_SHARED,
+ "v3d_hub", v3d);
++ if (ret)
++ goto fail;
++
+ ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 1),
+ v3d_irq, IRQF_SHARED,
+ "v3d_core0", v3d);
+ if (ret)
+- dev_err(v3d->dev, "IRQ setup failed: %d\n", ret);
++ goto fail;
+
+ v3d_irq_enable(v3d);
++ return 0;
++
++fail:
++ if (ret != -EPROBE_DEFER)
++ dev_err(v3d->dev, "IRQ setup failed: %d\n", ret);
++ return ret;
+ }
+
+ void
+--
+2.16.4
+
diff --git a/patches.fixes/mdio_bus-Fix-use-after-free-on-device_register-fails.patch b/patches.fixes/mdio_bus-Fix-use-after-free-on-device_register-fails.patch
index e3d80f260a..bbd0c53edd 100644
--- a/patches.fixes/mdio_bus-Fix-use-after-free-on-device_register-fails.patch
+++ b/patches.fixes/mdio_bus-Fix-use-after-free-on-device_register-fails.patch
@@ -4,7 +4,7 @@ Date: Thu, 21 Feb 2019 22:42:01 +0800
Subject: [PATCH] mdio_bus: Fix use-after-free on device_register fails
Git-commit: 6ff7b060535e87c2ae14dd8548512abfdda528fb
Patch-mainline: v5.0-rc8
-References: bsc#1051510
+References: bsc#1051510, CVE-2019-12819, bsc#1138291
KASAN has found use-after-free in fixed_mdio_bus_init,
commit 0c692d07842a ("drivers/net/phy/mdio_bus.c: call
diff --git a/patches.suse/net-nfc-Fix-NULL-dereference-on-nfc_llcp_build_tlv-f.patch b/patches.suse/net-nfc-Fix-NULL-dereference-on-nfc_llcp_build_tlv-f.patch
index 86846d7907..2df69ccc91 100644
--- a/patches.suse/net-nfc-Fix-NULL-dereference-on-nfc_llcp_build_tlv-f.patch
+++ b/patches.suse/net-nfc-Fix-NULL-dereference-on-nfc_llcp_build_tlv-f.patch
@@ -3,7 +3,7 @@ Date: Fri, 22 Feb 2019 15:37:58 +0800
Subject: net: nfc: Fix NULL dereference on nfc_llcp_build_tlv fails
Git-commit: 58bdd544e2933a21a51eecf17c3f5f94038261b5
Patch-mainline: v5.0
-References: networking-stable-19_03_07
+References: networking-stable-19_03_07, CVE-2019-12818, bsc#1138293
KASAN report this:
diff --git a/series.conf b/series.conf
index 75cf755ffb..78654688df 100644
--- a/series.conf
+++ b/series.conf
@@ -3658,6 +3658,7 @@
patches.arch/s390-dasd-Make-raw-I-O-usable-without-prefix-support.patch
patches.arch/s390-crash-Remove-unused-KEXEC_NOTE_BYTES.patch
patches.arch/ibmveth-properly-unwind-on-init-errors.patch
+ patches.drivers/dmaengine-ioat-don-t-use-DMA_ERROR_CODE.patch
patches.drm/0004-drm-exynos-don-t-use-dma_error_code
patches.drm/0005-drm-armada-don-t-abuse-dma_error_code
patches.drivers/0001-crypto-qat-avoid-an-uninitialized-variable-warning.patch
@@ -3909,6 +3910,7 @@
patches.drivers/bonding-avoid-NETDEV_CHANGEMTU-event-when-unregister.patch
patches.fixes/doc-SKB_GSO_-IPIP-SIT-have-been-replaced
patches.suse/0001-kernel-locking-Fix-compile-error-with-qrwlock.c.patch
+ patches.drivers/dmaengine-Replace-WARN_TAINT_ONCE-with-pr_warn_once.patch
patches.drivers/dmaengine-tegra-apb-Really-fix-runtime-pm-usage
patches.suse/0001-lib-raid6-Add-log-of-2-table-for-RAID6-HW-requiring-.patch
patches.drivers/dt-bindings-rcar-dmac-document-missing-error-interrupt.patch
@@ -9684,6 +9686,8 @@
patches.drivers/mfd-intel_soc_pmic-Differentiate-between-Bay-and-Che
patches.drivers/backlight-lm3630a-Bump-REG_MAX-value-to-0x50-instead
patches.drivers/dmaengine-xilinx_dma-Fix-error-code-format-specifier
+ patches.drivers/dmaengine-ioat-constify-pci_device_id.patch
+ patches.drivers/dmaengine-ioatdma-Add-intr_coalesce-sysfs-entry.patch
patches.drm/drm-i915-Quietly-cancel-FBC-activation-if-CRTC-is-tu
patches.drm/drm-i915-Recreate-vmapping-even-when-the-object-is-p
patches.drm/drm-i915-Always-wake-the-device-to-flush-the-GTT
@@ -19622,6 +19626,7 @@
patches.drivers/drivers-net-ethernet-qlogic-qed-Fix-__qed_spq_block-.patch
patches.suse/0001-locking-Remove-smp_read_barrier_depends-from-queued_.patch
patches.drivers/drivers-infiniband-Remove-now-redundant-smp_read_bar.patch
+ patches.drivers/drivers-dma-ioat-Remove-now-redundant-smp_read_barri.patch
patches.fixes/tools-lib-traceevent-Simplify-pointer-print-logic-an.patch
patches.fixes/tools-lib-traceevent-Fix-get_field_str-for-dynamic-s.patch
patches.arch/x86-mce-amd-define-a-function-to-get-smca-bank-type
@@ -39001,6 +39006,7 @@
patches.drivers/0010-mmc-core-improve-reasonableness-of-bus-width-setting.patch
patches.drivers/dmaengine-hsu-Support-dmaengine_terminate_sync
patches.drivers/dmaengine-idma64-Support-dmaengine_terminate_sync
+ patches.drivers/dmaengine-ioatdma-set-the-completion-address-registe.patch
patches.drivers/dmaengine-mv_xor_v2-kill-the-tasklets-upon-exit
patches.drivers/dmaengine-pl330-fix-irq-race-with-terminate_all.patch
patches.drivers/0023-watchdog-sp805-add-timeout-sec-DT-property-support.patch
@@ -40303,6 +40309,7 @@
patches.fixes/jffs2-free-jffs2_sb_info-through-jffs2_kill_sb.patch
patches.drivers/0048-mtd-devices-m25p80-Make-sure-WRITE_EN-is-issued-befo.patch
patches.drivers/0451-mtd-spi-nor-fsl-quadspi-Don-t-let-EINVAL-on-the-bus.patch
+ patches.drivers/mtd-spi-nor-intel-spi-Add-support-for-Intel-Ice-Lake.patch
patches.drivers/mtd-spi-nor-fsl-quadspi-fix-read-error-for-flash-siz.patch
patches.drivers/0413-mtd-rawnand-fsl_ifc-check-result-of-SRAM-initializat.patch
patches.drivers/0414-mtd-rawnand-fsl_ifc-fixup-SRAM-init-for-newer-ctrl-v.patch
@@ -41289,6 +41296,7 @@
patches.drivers/0417-dmaengine-fsl-edma-extract-common-fsl-edma-code-no-c.patch
patches.drivers/0418-dmaengine-fsl-edma-add-edma-version-and-configurable.patch
patches.drivers/driver-dma-ioat-Call-del_timer_sync-without-holding-.patch
+ patches.drivers/dmaengine-ioat-fix-prototype-of-ioat_enumerate_chann.patch
patches.fixes/dmaengine-dma-jz4780-Return-error-if-not-probed-from.patch
patches.drivers/PCI-ASPM-Fix-link_state-teardown-on-device-removal.patch
patches.drivers/PCI-ASPM-Do-not-initialize-link-state-when-aspm_disa.patch
@@ -45135,6 +45143,7 @@
patches.drivers/net-hns3-make-function-hclge_set_all_vf_rst-static.patch
patches.drivers/mdio_bus-Fix-PTR_ERR-usage-after-initialization-to-c.patch
patches.drivers/bnx2x-Remove-set-but-not-used-variable-mfw_vn.patch
+ patches.drivers/bnxt_en-Add-support-for-BCM957504.patch
patches.fixes/6lowpan-use-rbtree-for-IP-frag-queue.patch
patches.drivers/net-mlx5-Delete-unused-FPGA-QPN-variable.patch
patches.fixes/0001-cxgb4-Mask-out-interrupts-that-are-not-enabled.patch
@@ -45750,6 +45759,10 @@
patches.drivers/dmaengine-sa11x0-drop-useless-LIST_HEAD.patch
patches.drivers/dmaengine-qcom_hidma-assign-channel-cookie-correctly.patch
patches.drivers/dmaengine-mv_xor-Use-correct-device-for-DMA-API.patch
+ patches.drivers/dmaengine-ioatdma-Add-Snow-Ridge-ioatdma-device-id.patch
+ patches.drivers/dmaengine-ioatdma-disable-DCA-enabling-on-IOATDMA-v3.patch
+ patches.drivers/dmaengine-ioatdma-add-descriptor-pre-fetch-support-f.patch
+ patches.drivers/dmaengine-ioatdma-support-latency-tolerance-report-L.patch
patches.drivers/dmaengine-imx-dma-fix-warning-comparison-of-distinct.patch
patches.drivers/dmaengine-tegra-avoid-overflow-of-byte-tracking.patch
patches.suse/net-sit-fix-UBSAN-Undefined-behaviour-in-check_6rd.patch
@@ -45921,6 +45934,7 @@
patches.drivers/ALSA-hda-ca0132-Simplify-alt-firmware-loading-code.patch
patches.drivers/ALSA-pcm-Don-t-suspend-stream-in-unrecoverable-PCM-s.patch
patches.drivers/ALSA-hda-realtek-Fix-speakers-on-Acer-Predator-Helio.patch
+ patches.drivers/i2c-i801-Add-support-for-Intel-Comet-Lake.patch
patches.drivers/iommu-don-t-print-warning-when-iommu-driver-only-supports-unmanaged-domains
patches.drivers/iommu-amd-reserve-exclusion-range-in-iova-domain
patches.fixes/mm-Fix-modifying-of-page-protection-by-insert_pfn.patch
@@ -46263,6 +46277,7 @@
patches.drivers/spi-bcm2835aux-warn-in-dmesg-that-native-cs-is-not-r.patch
patches.drivers/spi-bcm2835aux-setup-gpio-cs-to-output-and-correct-l.patch
patches.drivers/spi-mem-fix-kernel-doc-for-spi_mem_dirmap_-read-writ.patch
+ patches.drivers/spi-pxa2xx-Add-support-for-Intel-Comet-Lake.patch
patches.fixes/0001-keys-safe-concurrent-user-session-uid-_keyring-acces.patch
patches.drivers/hid-core-move-usage-page-concatenation-to-main-item.patch
patches.drivers/HID-logitech-hidpp-change-low-battery-level-threshol.patch
@@ -46454,6 +46469,7 @@
patches.drivers/i40e-Able-to-add-up-to-16-MAC-filters-on-an-untruste.patch
patches.drivers/i40e-Fix-misleading-error-message.patch
patches.drivers/brcmfmac-fix-WARNING-during-USB-disconnect-in-case-o.patch
+ patches.drivers/brcmfmac-fix-NULL-pointer-derefence-during-USB-disco.patch
patches.drivers/brcmfmac-fix-race-during-disconnect-when-USB-complet.patch
patches.drivers/brcmfmac-fix-Oops-when-bringing-up-interface-during-.patch
patches.drivers/brcmfmac-convert-dev_init_lock-mutex-to-completion.patch
@@ -46571,6 +46587,7 @@
patches.drivers/ice-Use-more-efficient-structures.patch
patches.drivers/ice-Disable-sniffing-VF-traffic-on-PF.patch
patches.drivers/bnxt_en-Improve-NQ-reservations.patch
+ patches.drivers/bnxt_en-Add-device-IDs-0x1806-and-0x1752-for-57500-d.patch
patches.drivers/net-hns3-unify-maybe_stop_tx-for-TSO-and-non-TSO-cas.patch
patches.drivers/net-hns3-use-napi_schedule_irqoff-in-hard-interrupts.patch
patches.drivers/net-hns3-add-counter-for-times-RX-pages-gets-allocat.patch
@@ -46664,21 +46681,36 @@
patches.fixes/0001-media-pvrusb2-Prevent-a-buffer-overflow.patch
patches.drivers/media-coda-clear-error-return-value-before-picture-r.patch
patches.fixes/scripts-override-locale-from-environment-when-runnin.patch
+ patches.drm/drm-omap-dsi-Fix-PM-for-display-blank-with-paired-ds.patch
patches.drm/drm-rcar-du-Fix-rcar_du_crtc-structure-documentation.patch
+ patches.drm/drm-sun4i-dsi-Change-the-start-delay-calculation.patch
+ patches.drm/drm-sun4i-dsi-Enforce-boundaries-on-the-start-delay.patch
patches.drm/drm-Wake-up-next-in-drm_read-chain-if-we-are-forced-.patch
patches.drm/drm-drv-Hold-ref-on-parent-device-during-drm_device-.patch
+ patches.drm/drm-v3d-Handle-errors-from-IRQ-setup.patch
+ patches.drm/drm-add-non-desktop-quirks-to-Sensics-and-OSVR-heads.patch
patches.drm/drm-i915-Fix-I915_EXEC_RING_MASK.patch
patches.drm/drm-doc-Drop-content-type-from-the-legacy-kms-proper.patch
+ patches.drm/drm-amd-display-Set-stream-mode_changed-when-connect.patch
+ patches.drm/drm-amd-display-Fix-Divide-by-0-in-memory-calculatio.patch
+ patches.drm/drm-amd-display-fix-releasing-planes-when-exiting-od.patch
patches.drm/drm-fb-helper-dpms_legacy-Only-set-on-connectors-in-.patch
patches.drm/drm-fb-helper-generic-Call-drm_client_add-after-setu.patch
+ patches.drm/drm-panel-otm8009a-Add-delay-at-the-end-of-initializ.patch
+ patches.drm/drm-pl111-fix-possible-object-reference-leak.patch
patches.drm/drm-vmwgfx-Remove-set-but-not-used-variable-restart.patch
patches.drm/drm-i915-Force-2-96-MHz-cdclk-on-glk-cnl-when-audio-.patch
patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch
patches.drm/0005-drm-meson-add-size-and-alignment-requirements-for-du.patch
patches.drm/drm-tegra-gem-Fix-CPU-cache-maintenance-for-BO-s-all.patch
patches.drm/drm-amdgpu-fix-old-fence-check-in-amdgpu_fence_emit.patch
+ patches.drm/drm-msm-a5xx-fix-possible-object-reference-leak.patch
+ patches.drm/drm-lease-Make-sure-implicit-planes-are-leased.patch
+ patches.drm/drm-nouveau-bar-nv50-ensure-BAR-is-mapped.patch
patches.drm/0001-drm-nouveau-i2c-Disable-i2c-bus-access-after-fini.patch
patches.drm/drm-i915-icl-Whitelist-GEN9_SLICE_COMMON_ECO_CHICKEN.patch
+ patches.drm/drm-etnaviv-avoid-DMA-API-warning-when-importing-buf.patch
+ patches.drm/drm-add-non-desktop-quirk-for-Valve-HMDs.patch
patches.drm/drm-rockchip-shutdown-drm-subsystem-on-shutdown.patch
patches.drivers/ALSA-timer-Unify-timer-callback-process-code.patch
patches.drivers/ALSA-timer-Make-sure-to-clear-pending-ack-list.patch
@@ -46717,8 +46749,11 @@
patches.drivers/ASoC-RT5677-SPI-Disable-16Bit-SPI-Transfers.patch
patches.drivers/ASoC-max98090-Fix-restore-of-DAPM-Muxes.patch
patches.drivers/ALSA-hda-realtek-Support-low-power-consumption-ALC256.patch
+ patches.drivers/dmaengine-at_xdmac-remove-BUG_ON-macro-in-tasklet.patch
patches.drivers/dmaengine-axi-dmac-Don-t-check-the-number-of-frames-.patch
+ patches.drivers/dmaengine-pl330-_stop-clear-interrupt-status.patch
patches.drivers/dmaengine-tegra210-dma-free-dma-controller-in-remove.patch
+ patches.drivers/dmaengine-tegra210-adma-restore-channel-status.patch
patches.drivers/RDMA-hns-Only-assign-the-relatived-fields-of-psn-if-.patch
patches.drivers/RDMA-hns-Only-assign-the-fields-of-the-rq-psn-if-IB_.patch
patches.drivers/RDMA-hns-Update-the-range-of-raq_psn-field-of-qp-con.patch
@@ -46772,6 +46807,7 @@
patches.drivers/gpio-Remove-obsolete-comment-about-gpiochip_free_hog.patch
patches.drivers/mtd-nand-omap-Fix-comment-in-platform-data-using-wro.patch
patches.fixes/0001-mtd-spi-nor-intel-spi-Avoid-crossing-4K-address-boun.patch
+ patches.drivers/spi-nor-intel-spi-Add-support-for-Intel-Comet-Lake-S.patch
patches.drivers/mtd-part-fix-incorrect-format-specifier-for-an-unsig.patch
patches.drivers/iommu-arm-smmu-v3-Don-t-disable-SMMU-in-kdump-kernel.patch
patches.drivers/iommu-vt-d-don-t-request-page-request-irq-under-dmar_global_lock
@@ -46829,6 +46865,9 @@
patches.fixes/0001-xenbus-drop-useless-LIST_HEAD-in-xenbus_write_watch-.patch
patches.drivers/power-supply-axp288_charger-Fix-unchecked-return-val.patch
patches.drivers/power-supply-axp20x_usb_power-Fix-typo-in-VBUS-curre.patch
+ patches.drm/drm-amdgpu-remove-ATPX_DGPU_REQ_POWER_FOR_DISPLAYS-c.patch
+ patches.drm/drm-radeon-prefer-lower-reference-dividers.patch
+ patches.drm/drm-amdgpu-psp-move-psp-version-specific-function-po.patch
patches.drm/drm-i915-fbc-disable-framebuffer-compression-on-Gemi.patch
patches.drm/drm-bridge-adv7511-Fix-low-refresh-rate-selection.patch
patches.drm/drm-pl111-Initialize-clock-spinlock-early.patch
@@ -46865,6 +46904,7 @@
patches.drm/drm-vmwgfx-integer-underflow-in-vmw_cmd_dx_set_shade.patch
patches.drm/drm-sun4i-Fix-sun8i-HDMI-PHY-clock-initialization.patch
patches.drm/drm-sun4i-Fix-sun8i-HDMI-PHY-configuration-for-148.5.patch
+ patches.drm/drm-gma500-cdv-Check-vbt-config-bits-when-detecting-.patch
patches.drm/0002-drm-i915-gvt-Tiled-Resources-mmios-are-in-context-mm.patch
patches.drm/0003-drm-i915-gvt-add-0x4dfc-to-gen9-save-restore-list.patch
patches.drm/drm-i915-gvt-do-not-let-TRTTE-and-0x4dfc-write-passt.patch
@@ -46875,6 +46915,7 @@
patches.fixes/ext4-wait-for-outstanding-dio-during-truncate-in-noj.patch
patches.drivers/gpio-fix-gpio-adp5588-build-errors.patch
patches.fixes/0001-docs-Fix-conf.py-for-Sphinx-2.0.patch
+ patches.drm/drm-i915-Maintain-consistent-documentation-subsectio.patch
patches.drivers/ALSA-hda-realtek-Set-default-power-save-node-to-0.patch
patches.drivers/ALSA-hda-realtek-Enable-micmute-LED-for-Huawei-lapto.patch
patches.drivers/ALSA-hda-realtek-Improve-the-headset-mic-for-Acer-As.patch
@@ -46912,14 +46953,19 @@
patches.suse/kernel-signal.c-trace_signal_deliver-when-signal_gro.patch
patches.drivers/leds-avoid-flush_work-in-atomic-context.patch
patches.drivers/i2c-dev-fix-potential-memory-leak-in-i2cdev_ioctl_rd.patch
+ patches.drivers/i2c-synquacer-fix-synquacer_i2c_doxfer-return-value.patch
patches.arch/KVM-PPC-Book3S-HV-XIVE-Do-not-clear-IRQ-data-of-pass.patch
patches.arch/powerpc-perf-Fix-MMCRA-corruption-by-bhrb_filter.patch
patches.fixes/efi-x86-Add-missing-error-handling-to-old_memmap-1-1.patch
patches.fixes/fuse-fallocate-fix-return-with-locked-inode.patch
patches.drivers/hwmon-core-add-thermal-sensors-only-if-dev-of_node-i.patch
patches.drivers/hwmon-pmbus-core-Treat-parameters-as-paged-if-on-mul.patch
+ patches.drm/drm-i915-gvt-Initialize-intel_gvt_gtt_entry-in-stack.patch
patches.drm/0002-drm-i915-gvt-refine-ggtt-range-validation.patch
patches.drm/0003-drm-i915-gvt-Fix-cmd-length-of-VEB_DI_IECP.patch
+ patches.drm/drm-msm-fix-fb-references-in-async-update.patch
+ patches.drm/drm-don-t-block-fb-changes-for-async-plane-updates.patch
+ patches.drivers/dmaengine-tegra210-adma-Fix-crash-during-probe.patch
patches.drivers/parport-Fix-mem-leak-in-parport_register_dev_model.patch
patches.fixes/0001-test_firmware-Use-correct-snprintf-limit.patch
@@ -46929,6 +46975,8 @@
patches.drivers/ibmvnic-Fix-unchecked-return-codes-of-memory-allocat.patch
# davem/net-next
+ patches.drivers/cxgb4-Enable-hash-filter-with-offload.patch
+ patches.drivers/cxgb4-use-firmware-API-for-validating-filter-spec.patch
patches.drivers/qed-Modify-api-for-performing-a-dmae-to-another-PF.patch
patches.drivers/qed-Add-llh-ppfid-interface-and-100g-support-for-off.patch
patches.drivers/qed-Change-hwfn-used-for-sb-initialization.patch
@@ -46946,6 +46994,9 @@
# rdma/rdma for-next
patches.drivers/RDMA-qedr-Fix-incorrect-device-rate.patch
+ patches.drivers/RDMA-cxgb4-Use-sizeof-notation.patch
+ patches.drivers/RDMA-cxgb4-Don-t-expose-DMA-addresses.patch
+ patches.drivers/iw_cxgb4-Fix-qpid-leak.patch
patches.drivers/RDMA-hns-Update-CQE-specifications.patch
patches.drivers/RDMA-hns-Move-spin_lock_irqsave-to-the-correct-place.patch
patches.drivers/RDMA-hns-Remove-jiffies-operation-in-disable-interru.patch
@@ -47459,6 +47510,8 @@
patches.suse/nvdimm-testing-provide-SZ_4G.patch
+ patches.drivers/hid-input-fix-a4tech-horizontal-wheel-custom-usage.patch
+
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# Other drivers we have added to the tree
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