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authorPetr Tesarik <ptesarik@suse.cz>2019-07-19 23:10:59 +0200
committerPetr Tesarik <ptesarik@suse.cz>2019-07-19 23:18:40 +0200
commit33adda78569d540b856f37d61ecfd8cf0ee98107 (patch)
treeaaaa7866e93628f6a9ea0b59640004a4918820be
parent2cd8a186e52ab26320832f456b4981054e84219b (diff)
s390: add alignment hints to vector load and store (jsc#SLE-6907
FATE#327564 LTC#175887).
-rw-r--r--patches.suse/s390-add-alignment-hints-to-vector-load-and-store48
-rw-r--r--series.conf1
2 files changed, 49 insertions, 0 deletions
diff --git a/patches.suse/s390-add-alignment-hints-to-vector-load-and-store b/patches.suse/s390-add-alignment-hints-to-vector-load-and-store
new file mode 100644
index 0000000000..6d8034c0c8
--- /dev/null
+++ b/patches.suse/s390-add-alignment-hints-to-vector-load-and-store
@@ -0,0 +1,48 @@
+From: Martin Schwidefsky <schwidefsky@de.ibm.com>
+Date: Wed, 6 Feb 2019 18:06:03 +0100
+Subject: s390: add alignment hints to vector load and store
+Git-commit: 142c52d7bce45d335f48d53fdbf428bb15cf3924
+Patch-mainline: v5.1-rc1
+References: jsc#SLE-6907 FATE#327564 LTC#175887
+
+The z14 introduced alignment hints to increase the performance of
+vector loads and stores. The kernel uses an implicit alignmenet
+of 8 bytes for the vector registers, set the alignment hint to 3.
+
+Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
+Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
+Acked-by: Petr Tesarik <ptesarik@suse.com>
+---
+ arch/s390/include/asm/vx-insn.h | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/s390/include/asm/vx-insn.h
++++ b/arch/s390/include/asm/vx-insn.h
+@@ -362,23 +362,23 @@
+ .endm
+
+ /* VECTOR LOAD MULTIPLE */
+-.macro VLM vfrom, vto, disp, base
++.macro VLM vfrom, vto, disp, base, hint=3
+ VX_NUM v1, \vfrom
+ VX_NUM v3, \vto
+ GR_NUM b2, \base /* Base register */
+ .word 0xE700 | ((v1&15) << 4) | (v3&15)
+ .word (b2 << 12) | (\disp)
+- MRXBOPC 0, 0x36, v1, v3
++ MRXBOPC \hint, 0x36, v1, v3
+ .endm
+
+ /* VECTOR STORE MULTIPLE */
+-.macro VSTM vfrom, vto, disp, base
++.macro VSTM vfrom, vto, disp, base, hint=3
+ VX_NUM v1, \vfrom
+ VX_NUM v3, \vto
+ GR_NUM b2, \base /* Base register */
+ .word 0xE700 | ((v1&15) << 4) | (v3&15)
+ .word (b2 << 12) | (\disp)
+- MRXBOPC 0, 0x3E, v1, v3
++ MRXBOPC \hint, 0x3E, v1, v3
+ .endm
+
+ /* VECTOR PERMUTE */
diff --git a/series.conf b/series.conf
index e4d2c07c0c..3f89bdcd85 100644
--- a/series.conf
+++ b/series.conf
@@ -45463,6 +45463,7 @@
patches.arch/s390-setup-set-control-program-code-via-diag-318
patches.arch/s390-pci-improve-bar-check
patches.arch/s390-pci-map-iov-resources
+ patches.suse/s390-add-alignment-hints-to-vector-load-and-store
patches.arch/s390-jump_label-Use-jdd-constraint-on-gcc9.patch
patches.arch/s390-ism-ignore-some-errors-during-deregistration
patches.suse/s390-cpum_cf-move-counter-set-controls-to-a-new-header-file