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authorTakashi Iwai <tiwai@suse.de>2019-06-19 16:51:14 +0200
committerTakashi Iwai <tiwai@suse.de>2019-06-19 16:52:23 +0200
commit3a0bafca7d2c7704948dffb481e1bbe6dc595fed (patch)
treecb237d3860e4a5f6985871f746c813d7b90106e3
parentf0a31b649ada9c883d70b684f2ff7394ed1fa7a5 (diff)
drm/i915: Split Pineview device info into desktop and mobile
(jsc#SLE-4986).
-rw-r--r--patches.drm/drm-i915-Split-Pineview-device-info-into-desktop-and.patch119
-rw-r--r--series.conf1
2 files changed, 120 insertions, 0 deletions
diff --git a/patches.drm/drm-i915-Split-Pineview-device-info-into-desktop-and.patch b/patches.drm/drm-i915-Split-Pineview-device-info-into-desktop-and.patch
new file mode 100644
index 0000000000..bd50eaddbd
--- /dev/null
+++ b/patches.drm/drm-i915-Split-Pineview-device-info-into-desktop-and.patch
@@ -0,0 +1,119 @@
+From 86d35d4e7625f7c056d81316da107bd3a7564fb3 Mon Sep 17 00:00:00 2001
+From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Date: Tue, 26 Mar 2019 07:40:54 +0000
+Subject: [PATCH] drm/i915: Split Pineview device info into desktop and mobile
+Mime-version: 1.0
+Content-type: text/plain; charset=UTF-8
+Content-transfer-encoding: 8bit
+Git-commit: 86d35d4e7625f7c056d81316da107bd3a7564fb3
+Patch-mainline: v5.2-rc1
+References: jsc#SLE-4986
+
+This allows the IS_PINEVIEW_<G|M> macros to be removed and avoid
+duplication of device ids already defined in i915_pciids.h.
+
+!IS_MOBILE check can be used in place of existing IS_PINEVIEW_G call
+sites.
+
+Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Chris Wilson <chris@chris-wilson.co.uk>
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190326074057.27833-2-tvrtko.ursulin@linux.intel.com
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ arch/x86/kernel/early-quirks.c | 3 ++-
+ drivers/gpu/drm/i915/i915_drv.h | 2 --
+ drivers/gpu/drm/i915/i915_pci.c | 12 ++++++++++--
+ drivers/gpu/drm/i915/intel_pm.c | 4 ++--
+ include/drm/i915_pciids.h | 6 ++++--
+ 5 files changed, 18 insertions(+), 9 deletions(-)
+
+--- a/arch/x86/kernel/early-quirks.c
++++ b/arch/x86/kernel/early-quirks.c
+@@ -525,7 +525,8 @@ static const struct pci_device_id intel_
+ INTEL_I945G_IDS(&gen3_early_ops),
+ INTEL_I945GM_IDS(&gen3_early_ops),
+ INTEL_VLV_IDS(&gen6_early_ops),
+- INTEL_PINEVIEW_IDS(&gen3_early_ops),
++ INTEL_PINEVIEW_G_IDS(&gen3_early_ops),
++ INTEL_PINEVIEW_M_IDS(&gen3_early_ops),
+ INTEL_I965G_IDS(&gen3_early_ops),
+ INTEL_G33_IDS(&gen3_early_ops),
+ INTEL_I965GM_IDS(&gen3_early_ops),
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -2383,8 +2383,6 @@ intel_info(const struct drm_i915_private
+ #define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45)
+ #define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45)
+ #define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv))
+-#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
+-#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
+ #define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
+ #define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33)
+ #define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
+--- a/drivers/gpu/drm/i915/i915_pci.c
++++ b/drivers/gpu/drm/i915/i915_pci.c
+@@ -163,7 +163,14 @@ static const struct intel_device_info in
+ .has_overlay = 1,
+ };
+
+-static const struct intel_device_info intel_pineview_info = {
++static const struct intel_device_info intel_pineview_g_info = {
++ GEN3_FEATURES,
++ PLATFORM(INTEL_PINEVIEW),
++ .has_hotplug = 1,
++ .has_overlay = 1,
++};
++
++static const struct intel_device_info intel_pineview_m_info = {
+ GEN3_FEATURES,
+ PLATFORM(INTEL_PINEVIEW),
+ .is_mobile = 1,
+@@ -625,7 +632,8 @@ static const struct pci_device_id pciidl
+ INTEL_I965GM_IDS(&intel_i965gm_info),
+ INTEL_GM45_IDS(&intel_gm45_info),
+ INTEL_G45_IDS(&intel_g45_info),
+- INTEL_PINEVIEW_IDS(&intel_pineview_info),
++ INTEL_PINEVIEW_G_IDS(&intel_pineview_g_info),
++ INTEL_PINEVIEW_M_IDS(&intel_pineview_m_info),
+ INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
+ INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
+ INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -846,7 +846,7 @@ static void pineview_update_wm(struct in
+ u32 reg;
+ unsigned int wm;
+
+- latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
++ latency = intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
+ dev_priv->is_ddr3,
+ dev_priv->fsb_freq,
+ dev_priv->mem_freq);
+@@ -9372,7 +9372,7 @@ void intel_init_pm(struct drm_i915_priva
+ dev_priv->display.initial_watermarks = g4x_initial_watermarks;
+ dev_priv->display.optimize_watermarks = g4x_optimize_watermarks;
+ } else if (IS_PINEVIEW(dev_priv)) {
+- if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
++ if (!intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
+ dev_priv->is_ddr3,
+ dev_priv->fsb_freq,
+ dev_priv->mem_freq)) {
+--- a/include/drm/i915_pciids.h
++++ b/include/drm/i915_pciids.h
+@@ -108,8 +108,10 @@
+ INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
+ INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */
+
+-#define INTEL_PINEVIEW_IDS(info) \
+- INTEL_VGA_DEVICE(0xa001, info), \
++#define INTEL_PINEVIEW_G_IDS(info) \
++ INTEL_VGA_DEVICE(0xa001, info)
++
++#define INTEL_PINEVIEW_M_IDS(info) \
+ INTEL_VGA_DEVICE(0xa011, info)
+
+ #define INTEL_IRONLAKE_D_IDS(info) \
diff --git a/series.conf b/series.conf
index df5e408cfc..aac53b6562 100644
--- a/series.conf
+++ b/series.conf
@@ -46802,6 +46802,7 @@
patches.drm/drm-pl111-fix-possible-object-reference-leak.patch
patches.drm/drm-amd-display-Use-plane-color_space-for-dpp-if-spe.patch
patches.drm/drm-vmwgfx-Remove-set-but-not-used-variable-restart.patch
+ patches.drm/drm-i915-Split-Pineview-device-info-into-desktop-and.patch
patches.drm/drm-i915-Force-2-96-MHz-cdclk-on-glk-cnl-when-audio-.patch
patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch
patches.drm/0005-drm-meson-add-size-and-alignment-requirements-for-du.patch