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authorThomas Bogendoerfer <tbogendoerfer@suse.de>2019-06-19 18:03:06 +0200
committerThomas Bogendoerfer <tbogendoerfer@suse.de>2019-06-19 18:03:30 +0200
commit6295e50dee5dd8980c2937a6afc149906f4fd03c (patch)
treef14d42d0a7be7aa9c5f3b7956a19dc9e35230931
parent0aac5a00f94e77424d0d4a5be0fffc4813dd3e78 (diff)
platform/x86: mlx-platform: Add ASIC hotplug device
configuration (bsc#1112374).
-rw-r--r--patches.drivers/platform-x86-mlx-platform-Add-ASIC-hotplug-device-co.patch196
-rw-r--r--series.conf1
2 files changed, 197 insertions, 0 deletions
diff --git a/patches.drivers/platform-x86-mlx-platform-Add-ASIC-hotplug-device-co.patch b/patches.drivers/platform-x86-mlx-platform-Add-ASIC-hotplug-device-co.patch
new file mode 100644
index 0000000000..5a77582824
--- /dev/null
+++ b/patches.drivers/platform-x86-mlx-platform-Add-ASIC-hotplug-device-co.patch
@@ -0,0 +1,196 @@
+From: Vadim Pasternak <vadimp@mellanox.com>
+Date: Thu, 26 Jul 2018 22:41:00 +0000
+Subject: platform/x86: mlx-platform: Add ASIC hotplug device configuration
+Patch-mainline: v4.19-rc1
+Git-commit: 0404a0b2ca3b88eab1e44b7a1d80c2aeb37fb2f1
+References: bsc#1112374
+
+Add support for ASIC hotplug device events for the all system types. The
+ASIC hotplug event is sent in cases ASIC reaches the good health state or
+dropped to the bad health state. The health state is used to change, when
+device is reset or in case of some system failures. In such cases hwmon
+uevent notification will be sent.
+
+Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
+Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
+Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
+---
+ drivers/platform/x86/mlx-platform.c | 74 ++++++++++++++++++++++++++++++++++--
+ 1 file changed, 71 insertions(+), 3 deletions(-)
+
+--- a/drivers/platform/x86/mlx-platform.c
++++ b/drivers/platform/x86/mlx-platform.c
+@@ -65,6 +65,8 @@
+ #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40
+ #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41
+ #define MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET 0x50
++#define MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET 0x51
++#define MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET 0x52
+ #define MLXPLAT_CPLD_LPC_REG_PSU_OFFSET 0x58
+ #define MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET 0x59
+ #define MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET 0x5a
+@@ -100,17 +102,21 @@
+ MLXPLAT_CPLD_LPC_PIO_OFFSET)
+
+ /* Masks for aggregation, psu, pwr and fan event in CPLD related registers. */
++#define MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF 0x04
+ #define MLXPLAT_CPLD_AGGR_PSU_MASK_DEF 0x08
+ #define MLXPLAT_CPLD_AGGR_PWR_MASK_DEF 0x08
+ #define MLXPLAT_CPLD_AGGR_FAN_MASK_DEF 0x40
+-#define MLXPLAT_CPLD_AGGR_MASK_DEF (MLXPLAT_CPLD_AGGR_PSU_MASK_DEF | \
++#define MLXPLAT_CPLD_AGGR_MASK_DEF (MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF | \
++ MLXPLAT_CPLD_AGGR_PSU_MASK_DEF | \
+ MLXPLAT_CPLD_AGGR_FAN_MASK_DEF)
++#define MLXPLAT_CPLD_AGGR_ASIC_MASK_NG 0x01
+ #define MLXPLAT_CPLD_AGGR_MASK_NG_DEF 0x04
+-#define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc0
++#define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1
+ #define MLXPLAT_CPLD_AGGR_MASK_MSN21XX 0x04
+ #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0)
+ #define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0)
+ #define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0)
++#define MLXPLAT_CPLD_ASIC_MASK GENMASK(1, 0)
+ #define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(5, 0)
+ #define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4)
+ #define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0)
+@@ -315,6 +321,15 @@ static struct mlxreg_core_data mlxplat_m
+ },
+ };
+
++static struct mlxreg_core_data mlxplat_mlxcpld_default_asic_items_data[] = {
++ {
++ .label = "asic1",
++ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
++ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
++ },
++};
++
+ static struct mlxreg_core_item mlxplat_mlxcpld_default_items[] = {
+ {
+ .data = mlxplat_mlxcpld_default_psu_items_data,
+@@ -343,6 +358,15 @@ static struct mlxreg_core_item mlxplat_m
+ .inversed = 1,
+ .health = false,
+ },
++ {
++ .data = mlxplat_mlxcpld_default_asic_items_data,
++ .aggr_mask = MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF,
++ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
++ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
++ .inversed = 0,
++ .health = true,
++ },
+ };
+
+ static
+@@ -351,6 +375,8 @@ struct mlxreg_core_hotplug_platform_data
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_items),
+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
+ .mask = MLXPLAT_CPLD_AGGR_MASK_DEF,
++ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
++ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
+ };
+
+ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_pwr_items_data[] = {
+@@ -379,6 +405,15 @@ static struct mlxreg_core_item mlxplat_m
+ .inversed = 0,
+ .health = false,
+ },
++ {
++ .data = mlxplat_mlxcpld_default_asic_items_data,
++ .aggr_mask = MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF,
++ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
++ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
++ .inversed = 0,
++ .health = true,
++ },
+ };
+
+ static
+@@ -481,6 +516,15 @@ static struct mlxreg_core_item mlxplat_m
+ .inversed = 1,
+ .health = false,
+ },
++ {
++ .data = mlxplat_mlxcpld_default_asic_items_data,
++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
++ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
++ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
++ .inversed = 0,
++ .health = true,
++ },
+ };
+
+ static
+@@ -519,6 +563,15 @@ static struct mlxreg_core_item mlxplat_m
+ .inversed = 0,
+ .health = false,
+ },
++ {
++ .data = mlxplat_mlxcpld_default_asic_items_data,
++ .aggr_mask = MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF,
++ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
++ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
++ .inversed = 0,
++ .health = true,
++ },
+ };
+
+ static
+@@ -616,6 +669,15 @@ static struct mlxreg_core_item mlxplat_m
+ .inversed = 1,
+ .health = false,
+ },
++ {
++ .data = mlxplat_mlxcpld_default_asic_items_data,
++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
++ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
++ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
++ .inversed = 0,
++ .health = true,
++ },
+ };
+
+ static
+@@ -935,7 +997,7 @@ static struct mlxreg_core_data mlxplat_m
+ {
+ .label = "asic_health",
+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
+- .mask = GENMASK(1, 0),
++ .mask = MLXPLAT_CPLD_ASIC_MASK,
+ .bit = 1,
+ .mode = 0444,
+ },
+@@ -1033,6 +1095,8 @@ static bool mlxplat_mlxcpld_writeable_re
+ case MLXPLAT_CPLD_LPC_REG_WP2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
++ case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET:
++ case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWR_EVENT_OFFSET:
+@@ -1066,6 +1130,8 @@ static bool mlxplat_mlxcpld_readable_reg
+ case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET:
++ case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET:
++ case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET:
+@@ -1112,6 +1178,8 @@ static bool mlxplat_mlxcpld_volatile_reg
+ case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET:
++ case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET:
++ case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET:
diff --git a/series.conf b/series.conf
index 86313d41d4..f498439f64 100644
--- a/series.conf
+++ b/series.conf
@@ -39226,6 +39226,7 @@
patches.drivers/platform-x86-mlx-platform-Add-mlxreg-fan-platform-dr.patch
patches.drivers/platform-mellanox-mlxreg-hotplug-Improve-mechanism-o.patch
patches.drivers/platform-mellanox-mlxreg-hotplug-Add-hotplug-hwmon-u.patch
+ patches.drivers/platform-x86-mlx-platform-Add-ASIC-hotplug-device-co.patch
patches.drivers/platform-x86-asus-nb-wmi-Add-keymap-entry-for-lid-fl.patch
patches.arch/ARM-hwmod-RTC-Don-t-assume-lock-unlock-will-be-calle.patch
patches.arch/ARM-mvebu-declare-asm-symbols-as-character-arrays-in.patch