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authorTakashi Iwai <tiwai@suse.de>2019-06-19 16:51:14 +0200
committerTakashi Iwai <tiwai@suse.de>2019-06-19 16:52:35 +0200
commita9fa8703385e6f08d1f139eb528500ccd9679250 (patch)
treebe48e42fb2db5e40b4d5db9e1a0e265147335120
parentd9cacaaf23fec4a0160f63b1ef076c87a1c70870 (diff)
drm/i915: Split some PCI ids into separate groups
(jsc#SLE-4986).
-rw-r--r--patches.drm/drm-i915-Split-some-PCI-ids-into-separate-groups.patch351
-rw-r--r--series.conf1
2 files changed, 352 insertions, 0 deletions
diff --git a/patches.drm/drm-i915-Split-some-PCI-ids-into-separate-groups.patch b/patches.drm/drm-i915-Split-some-PCI-ids-into-separate-groups.patch
new file mode 100644
index 0000000000..f9ca73b49a
--- /dev/null
+++ b/patches.drm/drm-i915-Split-some-PCI-ids-into-separate-groups.patch
@@ -0,0 +1,351 @@
+From 4ae61358cc1ad537973b242cf390163a2f7b15b2 Mon Sep 17 00:00:00 2001
+From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Date: Tue, 26 Mar 2019 07:40:56 +0000
+Subject: [PATCH] drm/i915: Split some PCI ids into separate groups
+Git-commit: 4ae61358cc1ad537973b242cf390163a2f7b15b2
+Patch-mainline: v5.2-rc1
+References: jsc#SLE-4986
+
+This will enable the following patch to consolidate most device ids into
+i915_pciids.h.
+
+While cross-referencing the ids listed in i915_drv.h, with the ones listed
+in i915_pciids.h, and also the comments in the latter, a bug for bug
+approach was used. This means two things:
+
+1.
+Some ids are only present in i915_drv.h - obviously this means those parts
+would not have been probed at all so they were not added to i915_pciids.h
+
+2.
+Some part type comments in i915_pciids.h were in disagreement with
+i915_drv.h. For instance parts labeled as ULT or ULX were not considered
+as such in i915_drv.h. The existing behaviour takes precedence here.
+
+Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Suggested-by: Jani Nikula <jani.nikula@intel.com>
+Cc: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190326074057.27833-4-tvrtko.ursulin@linux.intel.com
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ include/drm/i915_pciids.h | 173 ++++++++++++++++++++++++++++++++--------------
+ 1 file changed, 124 insertions(+), 49 deletions(-)
+
+--- a/include/drm/i915_pciids.h
++++ b/include/drm/i915_pciids.h
+@@ -168,7 +168,18 @@
+ #define INTEL_IVB_Q_IDS(info) \
+ INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
+
++#define INTEL_HSW_ULT_GT1_IDS(info) \
++ INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
++ INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
++ INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
++ INTEL_VGA_DEVICE(0x0A06, info) /* ULT GT1 mobile */
++
++#define INTEL_HSW_ULX_GT1_IDS(info) \
++ INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
++
+ #define INTEL_HSW_GT1_IDS(info) \
++ INTEL_HSW_ULT_GT1_IDS(info), \
++ INTEL_HSW_ULX_GT1_IDS(info), \
+ INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
+ INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
+ INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
+@@ -177,20 +188,26 @@
+ INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
+ INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
+ INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
+- INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
+- INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
+- INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
+ INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
+ INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
+ INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
+ INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
+ INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
+ INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
+- INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
+- INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
+ INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */
+
++#define INTEL_HSW_ULT_GT2_IDS(info) \
++ INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
++ INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
++ INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
++ INTEL_VGA_DEVICE(0x0A16, info) /* ULT GT2 mobile */
++
++#define INTEL_HSW_ULX_GT2_IDS(info) \
++ INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
++
+ #define INTEL_HSW_GT2_IDS(info) \
++ INTEL_HSW_ULT_GT2_IDS(info), \
++ INTEL_HSW_ULX_GT2_IDS(info), \
+ INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
+ INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
+ INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
+@@ -199,9 +216,6 @@
+ INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
+ INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
+ INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
+- INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
+- INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
+- INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
+ INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
+ INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
+ INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
+@@ -209,11 +223,17 @@
+ INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
+ INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
+ INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
+- INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
+- INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
+ INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */
+
++#define INTEL_HSW_ULT_GT3_IDS(info) \
++ INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
++ INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
++ INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
++ INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
++ INTEL_VGA_DEVICE(0x0A2E, info) /* ULT GT3 reserved */
++
+ #define INTEL_HSW_GT3_IDS(info) \
++ INTEL_HSW_ULT_GT3_IDS(info), \
+ INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
+ INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
+ INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
+@@ -222,16 +242,11 @@
+ INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
+ INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
+ INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
+- INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
+- INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
+- INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
+ INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
+ INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
+ INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
+ INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
+ INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
+- INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
+- INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
+ INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */
+
+ #define INTEL_HSW_IDS(info) \
+@@ -247,35 +262,59 @@
+ INTEL_VGA_DEVICE(0x0157, info), \
+ INTEL_VGA_DEVICE(0x0155, info)
+
+-#define INTEL_BDW_GT1_IDS(info) \
+- INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
++#define INTEL_BDW_ULT_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
+- INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
+- INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
++ INTEL_VGA_DEVICE(0x160B, info) /* GT1 Iris */
++
++#define INTEL_BDW_ULX_GT1_IDS(info) \
++ INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */
++
++#define INTEL_BDW_GT1_IDS(info) \
++ INTEL_BDW_ULT_GT1_IDS(info), \
++ INTEL_BDW_ULX_GT1_IDS(info), \
++ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
+ INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
+ INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */
+
+-#define INTEL_BDW_GT2_IDS(info) \
+- INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
++#define INTEL_BDW_ULT_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
+- INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
+- INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \
++ INTEL_VGA_DEVICE(0x161B, info) /* GT2 ULT */
++
++#define INTEL_BDW_ULX_GT2_IDS(info) \
++ INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
++
++#define INTEL_BDW_GT2_IDS(info) \
++ INTEL_BDW_ULT_GT2_IDS(info), \
++ INTEL_BDW_ULX_GT2_IDS(info), \
++ INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
+ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
+ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
+
++#define INTEL_BDW_ULT_GT3_IDS(info) \
++ INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
++ INTEL_VGA_DEVICE(0x162B, info) /* Iris */ \
++
++#define INTEL_BDW_ULX_GT3_IDS(info) \
++ INTEL_VGA_DEVICE(0x162E, info) /* ULX */
++
+ #define INTEL_BDW_GT3_IDS(info) \
++ INTEL_BDW_ULT_GT3_IDS(info), \
++ INTEL_BDW_ULX_GT3_IDS(info), \
+ INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
+- INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
+- INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
+- INTEL_VGA_DEVICE(0x162E, info), /* ULX */\
+ INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
+ INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
+
++#define INTEL_BDW_ULT_RSVD_IDS(info) \
++ INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
++ INTEL_VGA_DEVICE(0x163B, info) /* Iris */
++
++#define INTEL_BDW_ULX_RSVD_IDS(info) \
++ INTEL_VGA_DEVICE(0x163E, info) /* ULX */
++
+ #define INTEL_BDW_RSVD_IDS(info) \
++ INTEL_BDW_ULT_RSVD_IDS(info), \
++ INTEL_BDW_ULX_RSVD_IDS(info), \
+ INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
+- INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
+- INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
+- INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \
+ INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
+ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
+
+@@ -291,25 +330,40 @@
+ INTEL_VGA_DEVICE(0x22b2, info), \
+ INTEL_VGA_DEVICE(0x22b3, info)
+
++#define INTEL_SKL_ULT_GT1_IDS(info) \
++ INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
++
++#define INTEL_SKL_ULX_GT1_IDS(info) \
++ INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
++
+ #define INTEL_SKL_GT1_IDS(info) \
+- INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
+- INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
++ INTEL_SKL_ULT_GT1_IDS(info), \
++ INTEL_SKL_ULX_GT1_IDS(info), \
+ INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \
+ INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
+ INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
+
+-#define INTEL_SKL_GT2_IDS(info) \
++#define INTEL_SKL_ULT_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
+- INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
+- INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
++ INTEL_VGA_DEVICE(0x1921, info) /* ULT GT2F */
++
++#define INTEL_SKL_ULX_GT2_IDS(info) \
++ INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */
++
++#define INTEL_SKL_GT2_IDS(info) \
++ INTEL_SKL_ULT_GT2_IDS(info), \
++ INTEL_SKL_ULX_GT2_IDS(info), \
+ INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \
+ INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
+ INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
+ INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */
+
++#define INTEL_SKL_ULT_GT3_IDS(info) \
++ INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */
++
+ #define INTEL_SKL_GT3_IDS(info) \
++ INTEL_SKL_ULT_GT3_IDS(info), \
+ INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
+- INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
+ INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
+ INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
+ INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3 */
+@@ -338,29 +392,44 @@
+ INTEL_VGA_DEVICE(0x3184, info), \
+ INTEL_VGA_DEVICE(0x3185, info)
+
+-#define INTEL_KBL_GT1_IDS(info) \
+- INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
+- INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
++#define INTEL_KBL_ULT_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
++ INTEL_VGA_DEVICE(0x5913, info) /* ULT GT1.5 */
++
++#define INTEL_KBL_ULX_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
++ INTEL_VGA_DEVICE(0x5915, info) /* ULX GT1.5 */
++
++#define INTEL_KBL_GT1_IDS(info) \
++ INTEL_KBL_ULT_GT1_IDS(info), \
++ INTEL_KBL_ULX_GT1_IDS(info), \
+ INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \
+ INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
+ INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
+ INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
+
+-#define INTEL_KBL_GT2_IDS(info) \
++#define INTEL_KBL_ULT_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
++ INTEL_VGA_DEVICE(0x5921, info) /* ULT GT2F */
++
++#define INTEL_KBL_ULX_GT2_IDS(info) \
++ INTEL_VGA_DEVICE(0x591E, info) /* ULX GT2 */
++
++#define INTEL_KBL_GT2_IDS(info) \
++ INTEL_KBL_ULT_GT2_IDS(info), \
++ INTEL_KBL_ULX_GT2_IDS(info), \
+ INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
+- INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
+- INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
+ INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \
+ INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
+ INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
+ INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
+
++#define INTEL_KBL_ULT_GT3_IDS(info) \
++ INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */
++
+ #define INTEL_KBL_GT3_IDS(info) \
++ INTEL_KBL_ULT_GT3_IDS(info), \
+ INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
+- INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
+ INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
+
+ #define INTEL_KBL_GT4_IDS(info) \
+@@ -467,7 +536,14 @@
+ INTEL_CML_GT2_IDS(info)
+
+ /* CNL */
++#define INTEL_CNL_PORT_F_IDS(info) \
++ INTEL_VGA_DEVICE(0x5A54, info), \
++ INTEL_VGA_DEVICE(0x5A5C, info), \
++ INTEL_VGA_DEVICE(0x5A44, info), \
++ INTEL_VGA_DEVICE(0x5A4C, info)
++
+ #define INTEL_CNL_IDS(info) \
++ INTEL_CNL_PORT_F_IDS(info), \
+ INTEL_VGA_DEVICE(0x5A51, info), \
+ INTEL_VGA_DEVICE(0x5A59, info), \
+ INTEL_VGA_DEVICE(0x5A41, info), \
+@@ -477,16 +553,11 @@
+ INTEL_VGA_DEVICE(0x5A42, info), \
+ INTEL_VGA_DEVICE(0x5A4A, info), \
+ INTEL_VGA_DEVICE(0x5A50, info), \
+- INTEL_VGA_DEVICE(0x5A40, info), \
+- INTEL_VGA_DEVICE(0x5A54, info), \
+- INTEL_VGA_DEVICE(0x5A5C, info), \
+- INTEL_VGA_DEVICE(0x5A44, info), \
+- INTEL_VGA_DEVICE(0x5A4C, info)
++ INTEL_VGA_DEVICE(0x5A40, info)
+
+ /* ICL */
+-#define INTEL_ICL_11_IDS(info) \
++#define INTEL_ICL_PORT_F_IDS(info) \
+ INTEL_VGA_DEVICE(0x8A50, info), \
+- INTEL_VGA_DEVICE(0x8A51, info), \
+ INTEL_VGA_DEVICE(0x8A5C, info), \
+ INTEL_VGA_DEVICE(0x8A5D, info), \
+ INTEL_VGA_DEVICE(0x8A59, info), \
+@@ -500,4 +571,8 @@
+ INTEL_VGA_DEVICE(0x8A70, info), \
+ INTEL_VGA_DEVICE(0x8A53, info)
+
++#define INTEL_ICL_11_IDS(info) \
++ INTEL_ICL_PORT_F_IDS(info), \
++ INTEL_VGA_DEVICE(0x8A51, info)
++
+ #endif /* _I915_PCIIDS_H */
diff --git a/series.conf b/series.conf
index 50e8aff541..c7b8980dfe 100644
--- a/series.conf
+++ b/series.conf
@@ -46804,6 +46804,7 @@
patches.drm/drm-vmwgfx-Remove-set-but-not-used-variable-restart.patch
patches.drm/drm-i915-Split-Pineview-device-info-into-desktop-and.patch
patches.drm/drm-i915-Remove-redundant-device-id-from-IS_IRONLAKE.patch
+ patches.drm/drm-i915-Split-some-PCI-ids-into-separate-groups.patch
patches.drm/drm-i915-Force-2-96-MHz-cdclk-on-glk-cnl-when-audio-.patch
patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch
patches.drm/0005-drm-meson-add-size-and-alignment-requirements-for-du.patch