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authorBorislav Petkov <bp@suse.de>2019-06-15 15:11:28 +0200
committerBorislav Petkov <bp@suse.de>2019-06-15 15:11:28 +0200
commit9cfd6b0d3851d50bae5d00e4aec68745a4debe83 (patch)
treefcc1d18d006645f7314d416e89f7c1c1e4bc511f
parentd26ddbbef67d3da0f30368a6659c9eb267d7ac4c (diff)
x86/xen: Add Hygon Dhyana support to Xen (fate#327735).
-rw-r--r--patches.arch/x86-xen-add-hygon-dhyana-support-to-xen.patch78
-rw-r--r--series.conf1
2 files changed, 79 insertions, 0 deletions
diff --git a/patches.arch/x86-xen-add-hygon-dhyana-support-to-xen.patch b/patches.arch/x86-xen-add-hygon-dhyana-support-to-xen.patch
new file mode 100644
index 0000000000..773d267acf
--- /dev/null
+++ b/patches.arch/x86-xen-add-hygon-dhyana-support-to-xen.patch
@@ -0,0 +1,78 @@
+From: Pu Wen <puwen@hygon.cn>
+Date: Sun, 23 Sep 2018 17:36:46 +0800
+Subject: x86/xen: Add Hygon Dhyana support to Xen
+Git-commit: 4044240365e85ef7ae43a6dc454669b57853124c
+Patch-mainline: v4.20-rc1
+References: fate#327735
+
+To make Xen work on the Hygon platform, reuse AMD's Xen support code
+path for Hygon Dhyana CPU.
+
+There are six core performance events counters per thread, so there are
+six MSRs for these counters. Also there are four legacy PMC MSRs, they
+are aliases of the counters.
+
+In this version, use the legacy and safe version of MSR access. Tested
+successfully with VPMU enabled in Xen on Hygon platform by testing with
+perf.
+
+Signed-off-by: Pu Wen <puwen@hygon.cn>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
+Cc: jgross@suse.com
+Cc: tglx@linutronix.de
+Cc: mingo@redhat.com
+Cc: hpa@zytor.com
+Cc: x86@kernel.org
+Cc: thomas.lendacky@amd.com
+Cc: xen-devel@lists.xenproject.org
+Link: https://lkml.kernel.org/r/311bf41f08f24550aa6c5da3f1e03a68d3b89dac.1537533369.git.puwen@hygon.cn
+---
+ arch/x86/xen/pmu.c | 12 +++++++++---
+ 1 file changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
+index 7d00d4ad44d4..9403854cde31 100644
+--- a/arch/x86/xen/pmu.c
++++ b/arch/x86/xen/pmu.c
+@@ -90,6 +90,12 @@ static void xen_pmu_arch_init(void)
+ k7_counters_mirrored = 0;
+ break;
+ }
++ } else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
++ amd_num_counters = F10H_NUM_COUNTERS;
++ amd_counters_base = MSR_K7_PERFCTR0;
++ amd_ctrls_base = MSR_K7_EVNTSEL0;
++ amd_msr_step = 1;
++ k7_counters_mirrored = 0;
+ } else {
+ uint32_t eax, ebx, ecx, edx;
+
+@@ -285,7 +291,7 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
+
+ bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
+ {
+- if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
++ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
+ if (is_amd_pmu_msr(msr)) {
+ if (!xen_amd_pmu_emulate(msr, val, 1))
+ *val = native_read_msr_safe(msr, err);
+@@ -308,7 +314,7 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
+ {
+ uint64_t val = ((uint64_t)high << 32) | low;
+
+- if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
++ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
+ if (is_amd_pmu_msr(msr)) {
+ if (!xen_amd_pmu_emulate(msr, &val, 0))
+ *err = native_write_msr_safe(msr, low, high);
+@@ -379,7 +385,7 @@ static unsigned long long xen_intel_read_pmc(int counter)
+
+ unsigned long long xen_read_pmc(int counter)
+ {
+- if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
++ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+ return xen_amd_read_pmc(counter);
+ else
+ return xen_intel_read_pmc(counter);
+
diff --git a/series.conf b/series.conf
index 806dce5247..409698809d 100644
--- a/series.conf
+++ b/series.conf
@@ -19543,6 +19543,7 @@
patches.arch/x86-bugs-add-hygon-dhyana-to-the-respective-mitigation-machinery.patch
patches.arch/x86-mce-add-hygon-dhyana-support-to-the-mca-infrastructure.patch
patches.arch/x86-kvm-add-hygon-dhyana-support-to-kvm.patch
+ patches.arch/x86-xen-add-hygon-dhyana-support-to-xen.patch
patches.fixes/0001-x86-xen-Fix-boot-loader-version-reported-for-PVH-gue.patch
patches.arch/x86-kexec-correct-kexec_backup_src_end-off-by-one-error.patch
patches.fixes/resource-include-resource-end-in-walk_-interfaces.patch