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authorThomas Zimmermann <tzimmermann@suse.de>2019-01-10 15:58:59 +0100
committerThomas Zimmermann <tzimmermann@suse.de>2019-01-11 13:41:55 +0100
commit342cdfa74322aa752c80e31e72bda64080b8eb97 (patch)
tree20ef013843ce64748c522aabe24e6f596b8e9f0b
parentee9b413dc6181deacfa5651b19ff2e1bf39a4101 (diff)
drm/i915/psr: Remove wait_for_idle() for PSR2 (bsc#1113956)
-rw-r--r--patches.drm/0038-drm-i915-psr-Remove-wait_for_idle-for-PSR2.patch72
-rw-r--r--series.conf1
2 files changed, 73 insertions, 0 deletions
diff --git a/patches.drm/0038-drm-i915-psr-Remove-wait_for_idle-for-PSR2.patch b/patches.drm/0038-drm-i915-psr-Remove-wait_for_idle-for-PSR2.patch
new file mode 100644
index 0000000000..340d14bafe
--- /dev/null
+++ b/patches.drm/0038-drm-i915-psr-Remove-wait_for_idle-for-PSR2.patch
@@ -0,0 +1,72 @@
+From fd255f6e3704d183f6f5011efd01fcda70372cab Mon Sep 17 00:00:00 2001
+From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
+Date: Fri, 24 Aug 2018 16:08:43 -0700
+Subject: drm/i915/psr: Remove wait_for_idle() for PSR2
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+Git-commit: fd255f6e3704d183f6f5011efd01fcda70372cab
+Patch-mainline: v4.20-rc1
+References: bsc#1113956
+
+CI runs show PSR2 does not go to IDLE with selective update enabled on
+all PSR exit triggers. Specifically, logs indicate the hardware enters
+"SLEEP Selective Update" and not "IDLE Reset state', like the kernel
+expects, when vblank interrupts are enabled. This check was added for PSR1
+but incorrectly extended to PSR2, remove the check as it breaks tests
+and prints out misleading error messages.
+
+v2: Split out non-code changes (Rodrigo)
+
+Cc: Tarun Vyas <tarun.vyas@intel.com>
+Cc: José Roberto de Souza <jose.souza@intel.com>
+Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Fixes: c43dbcbbcc8c ("drm/i915/psr: Lockless version of psr_wait_for_idle")
+Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20180824230844.12428-1-dhinakaran.pandiyan@intel.com
+Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
+---
+ drivers/gpu/drm/i915/intel_psr.c | 18 +++++++-----------
+ 1 file changed, 7 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_psr.c
++++ b/drivers/gpu/drm/i915/intel_psr.c
+@@ -721,8 +721,6 @@ int intel_psr_wait_for_idle(const struct
+ {
+ struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+- i915_reg_t reg;
+- u32 mask;
+
+ if (!new_crtc_state->has_psr)
+ return 0;
+@@ -737,21 +735,19 @@ int intel_psr_wait_for_idle(const struct
+ * not needed and will induce latencies in the atomic
+ * update path.
+ */
+- if (dev_priv->psr.psr2_enabled) {
+- reg = EDP_PSR2_STATUS;
+- mask = EDP_PSR2_STATUS_STATE_MASK;
+- } else {
+- reg = EDP_PSR_STATUS;
+- mask = EDP_PSR_STATUS_STATE_MASK;
+- }
++
++ /* FIXME: Update this for PSR2 if we need to wait for idle */
++ if (READ_ONCE(dev_priv->psr.psr2_enabled))
++ return 0;
+
+ /*
+ * Max time for PSR to idle = Inverse of the refresh rate +
+ * 6 ms of exit training time + 1.5 ms of aux channel
+ * handshake. 50 msec is defesive enough to cover everything.
+ */
+- return intel_wait_for_register(dev_priv, reg, mask,
+- EDP_PSR_STATUS_STATE_IDLE, 50);
++ return __intel_wait_for_register(dev_priv, EDP_PSR_STATUS,
++ EDP_PSR_STATUS_STATE_MASK,
++ EDP_PSR_STATUS_STATE_IDLE, 50);
+ }
+
+ static bool __psr_wait_for_idle_locked(struct drm_i915_private *dev_priv)
diff --git a/series.conf b/series.conf
index 04674056bc..dd37900252 100644
--- a/series.conf
+++ b/series.conf
@@ -40809,6 +40809,7 @@
patches.drm/drm-rockchip-Allow-driver-to-be-shutdown-on-reboot-k.patch
patches.drm/0028-drm-i915-guc-Move-the-pin-bias-value-from-GuC-to-GGT.patch
patches.drm/drm-i915-cfl-Add-a-new-CFL-PCI-ID
+ patches.drm/0038-drm-i915-psr-Remove-wait_for_idle-for-PSR2.patch
patches.drm/drm-amdgpu-add-missing-CHIP_HAINAN-in-amdgpu_ucode_g.patch
patches.drm/0001-drm-hisilicon-hibmc-Do-not-carry-error-code-in-HiBMC.patch
patches.drm/0001-drm-hisilicon-hibmc-Don-t-overwrite-fb-helper-surfac.patch