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authorNicolas Saenz Julienne <nsaenzjulienne@suse.de>2019-01-11 12:43:24 +0100
committerNicolas Saenz Julienne <nsaenzjulienne@suse.de>2019-01-11 12:43:24 +0100
commit6e5a55713d1bf241a637b3bded8dfcb51cd93f07 (patch)
tree86f0932cfc867c1ccea335a9ccee383c0de11549
parente29e6e3d4ba1fad7b2e4a118377fe33ad0e2c016 (diff)
- xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers
(bsc#1120854) - Refresh: patches.drivers/xhci-add-quirk-to-workaround-the-errata-seen-on-cavium-thunder-x2-soc.patch - Refresh: patches.fixes/0001-xhci-workaround-CSS-timeout-on-AMD-SNPS-3.0-xHC.patch
-rw-r--r--patches.drivers/xhci-add-quirk-to-workaround-the-errata-seen-on-cavium-thunder-x2-soc.patch4
-rw-r--r--patches.drivers/xhci-add-quirk-to-zero-64bit-registers-on-renesas-pcie-controllers.patch155
-rw-r--r--patches.fixes/0001-xhci-workaround-CSS-timeout-on-AMD-SNPS-3.0-xHC.patch12
-rw-r--r--series.conf1
4 files changed, 164 insertions, 8 deletions
diff --git a/patches.drivers/xhci-add-quirk-to-workaround-the-errata-seen-on-cavium-thunder-x2-soc.patch b/patches.drivers/xhci-add-quirk-to-workaround-the-errata-seen-on-cavium-thunder-x2-soc.patch
index cb38587e20..a99dfc7b48 100644
--- a/patches.drivers/xhci-add-quirk-to-workaround-the-errata-seen-on-cavium-thunder-x2-soc.patch
+++ b/patches.drivers/xhci-add-quirk-to-workaround-the-errata-seen-on-cavium-thunder-x2-soc.patch
@@ -36,7 +36,7 @@ to move the quirk to bit 29 (should have been bit 34 with quirk being a long).
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
-@@ -236,6 +236,11 @@ static void xhci_pci_quirks(struct devic
+@@ -240,6 +240,11 @@ static void xhci_pci_quirks(struct devic
if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
@@ -109,5 +109,5 @@ to move the quirk to bit 29 (should have been bit 34 with quirk being a long).
#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28)
+#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(29)
#define XHCI_SUSPEND_DELAY BIT_ULL(30)
+ #define XHCI_ZERO_64B_REGS BIT_ULL(32)
- unsigned int num_active_eps;
diff --git a/patches.drivers/xhci-add-quirk-to-zero-64bit-registers-on-renesas-pcie-controllers.patch b/patches.drivers/xhci-add-quirk-to-zero-64bit-registers-on-renesas-pcie-controllers.patch
new file mode 100644
index 0000000000..9eb3881ea1
--- /dev/null
+++ b/patches.drivers/xhci-add-quirk-to-zero-64bit-registers-on-renesas-pcie-controllers.patch
@@ -0,0 +1,155 @@
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Wed, 23 May 2018 18:41:37 +0100
+Subject: xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers
+Git-commit: 12de0a35c996c3a75d050bff748815db3432849c
+Patch-mainline: v4.18-rc1
+References: bsc#1120854
+
+Some Renesas controllers get into a weird state if they are reset while
+programmed with 64bit addresses (they will preserve the top half of the
+address in internal, non visible registers).
+
+You end up with half the address coming from the kernel, and the other
+half coming from the firmware.
+
+Also, changing the programming leads to extra accesses even if the
+controller is supposed to be halted. The controller ends up with a fatal
+fault, and is then ripe for being properly reset. On the flip side,
+this is completely unsafe if the defvice isn't behind an IOMMU, so
+we have to make sure that this is the case. Can you say "broken"?
+
+This is an alternative method to the one introduced in 8466489ef5ba
+("xhci: Reset Renesas uPD72020x USB controller for 32-bit DMA issue"),
+which will subsequently be removed.
+
+Tested-by: Domenico Andreoli <domenico.andreoli@linux.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Tested-by: Faiz Abbas <faiz_abbas@ti.com>
+Tested-by: Domenico Andreoli <domenico.andreoli@linux.com>
+Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+---
+ drivers/usb/host/xhci-pci.c | 8 ++++-
+ drivers/usb/host/xhci.c | 65 ++++++++++++++++++++++++++++++++++++++++++++
+ drivers/usb/host/xhci.h | 1
+ 3 files changed, 72 insertions(+), 2 deletions(-)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -207,11 +207,15 @@ static void xhci_pci_quirks(struct devic
+ xhci->quirks |= XHCI_BROKEN_STREAMS;
+ }
+ if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
+- pdev->device == 0x0014)
++ pdev->device == 0x0014) {
+ xhci->quirks |= XHCI_TRUST_TX_LENGTH;
++ xhci->quirks |= XHCI_ZERO_64B_REGS;
++ }
+ if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
+- pdev->device == 0x0015)
++ pdev->device == 0x0015) {
+ xhci->quirks |= XHCI_RESET_ON_RESUME;
++ xhci->quirks |= XHCI_ZERO_64B_REGS;
++ }
+ if (pdev->vendor == PCI_VENDOR_ID_VIA)
+ xhci->quirks |= XHCI_RESET_ON_RESUME;
+
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -219,6 +219,68 @@ int xhci_reset(struct xhci_hcd *xhci)
+ return ret;
+ }
+
++static void xhci_zero_64b_regs(struct xhci_hcd *xhci)
++{
++ struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
++ int err, i;
++ u64 val;
++
++ /*
++ * Some Renesas controllers get into a weird state if they are
++ * reset while programmed with 64bit addresses (they will preserve
++ * the top half of the address in internal, non visible
++ * registers). You end up with half the address coming from the
++ * kernel, and the other half coming from the firmware. Also,
++ * changing the programming leads to extra accesses even if the
++ * controller is supposed to be halted. The controller ends up with
++ * a fatal fault, and is then ripe for being properly reset.
++ *
++ * Special care is taken to only apply this if the device is behind
++ * an iommu. Doing anything when there is no iommu is definitely
++ * unsafe...
++ */
++ if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !dev->iommu_group)
++ return;
++
++ xhci_info(xhci, "Zeroing 64bit base registers, expecting fault\n");
++
++ /* Clear HSEIE so that faults do not get signaled */
++ val = readl(&xhci->op_regs->command);
++ val &= ~CMD_HSEIE;
++ writel(val, &xhci->op_regs->command);
++
++ /* Clear HSE (aka FATAL) */
++ val = readl(&xhci->op_regs->status);
++ val |= STS_FATAL;
++ writel(val, &xhci->op_regs->status);
++
++ /* Now zero the registers, and brace for impact */
++ val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
++ if (upper_32_bits(val))
++ xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
++ val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
++ if (upper_32_bits(val))
++ xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
++
++ for (i = 0; i < HCS_MAX_INTRS(xhci->hcs_params1); i++) {
++ struct xhci_intr_reg __iomem *ir;
++
++ ir = &xhci->run_regs->ir_set[i];
++ val = xhci_read_64(xhci, &ir->erst_base);
++ if (upper_32_bits(val))
++ xhci_write_64(xhci, 0, &ir->erst_base);
++ val= xhci_read_64(xhci, &ir->erst_dequeue);
++ if (upper_32_bits(val))
++ xhci_write_64(xhci, 0, &ir->erst_dequeue);
++ }
++
++ /* Wait for the fault to appear. It will be cleared on reset */
++ err = xhci_handshake(&xhci->op_regs->status,
++ STS_FATAL, STS_FATAL,
++ XHCI_MAX_HALT_USEC);
++ if (!err)
++ xhci_info(xhci, "Fault detected\n");
++}
+
+ #ifdef CONFIG_USB_PCI
+ /*
+@@ -1014,6 +1076,7 @@ int xhci_resume(struct xhci_hcd *xhci, b
+
+ xhci_dbg(xhci, "Stop HCD\n");
+ xhci_halt(xhci);
++ xhci_zero_64b_regs(xhci);
+ xhci_reset(xhci);
+ spin_unlock_irq(&xhci->lock);
+ xhci_cleanup_msix(xhci);
+@@ -4837,6 +4900,8 @@ int xhci_gen_setup(struct usb_hcd *hcd,
+ if (retval)
+ return retval;
+
++ xhci_zero_64b_regs(xhci);
++
+ xhci_dbg(xhci, "Resetting HCD\n");
+ /* Reset the internal HC memory state and registers. */
+ retval = xhci_reset(xhci);
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1832,6 +1832,7 @@ struct xhci_hcd {
+ #define XHCI_U2_DISABLE_WAKE BIT_ULL(27)
+ #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28)
+ #define XHCI_SUSPEND_DELAY BIT_ULL(30)
++#define XHCI_ZERO_64B_REGS BIT_ULL(32)
+
+ unsigned int num_active_eps;
+ unsigned int limit_active_eps;
diff --git a/patches.fixes/0001-xhci-workaround-CSS-timeout-on-AMD-SNPS-3.0-xHC.patch b/patches.fixes/0001-xhci-workaround-CSS-timeout-on-AMD-SNPS-3.0-xHC.patch
index 6047aa10bb..c8fe860ffd 100644
--- a/patches.fixes/0001-xhci-workaround-CSS-timeout-on-AMD-SNPS-3.0-xHC.patch
+++ b/patches.fixes/0001-xhci-workaround-CSS-timeout-on-AMD-SNPS-3.0-xHC.patch
@@ -47,7 +47,7 @@ Signed-off-by: Oliver Neukum <oneukum@suse.com>
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
-@@ -916,6 +916,7 @@ int xhci_suspend(struct xhci_hcd *xhci,
+@@ -978,6 +978,7 @@ int xhci_suspend(struct xhci_hcd *xhci,
unsigned int delay = XHCI_MAX_HALT_USEC;
struct usb_hcd *hcd = xhci_to_hcd(xhci);
u32 command;
@@ -55,7 +55,7 @@ Signed-off-by: Oliver Neukum <oneukum@suse.com>
if (!hcd->state)
return 0;
-@@ -967,11 +968,28 @@ int xhci_suspend(struct xhci_hcd *xhci,
+@@ -1029,11 +1030,28 @@ int xhci_suspend(struct xhci_hcd *xhci,
command = readl(&xhci->op_regs->command);
command |= CMD_CSS;
writel(command, &xhci->op_regs->command);
@@ -87,7 +87,7 @@ Signed-off-by: Oliver Neukum <oneukum@suse.com>
}
spin_unlock_irq(&xhci->lock);
-@@ -1024,7 +1042,7 @@ int xhci_resume(struct xhci_hcd *xhci, b
+@@ -1086,7 +1104,7 @@ int xhci_resume(struct xhci_hcd *xhci, b
set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
spin_lock_irq(&xhci->lock);
@@ -98,15 +98,15 @@ Signed-off-by: Oliver Neukum <oneukum@suse.com>
if (!hibernated) {
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1837,6 +1837,7 @@ struct xhci_hcd {
- #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28)
+@@ -1838,6 +1838,7 @@ struct xhci_hcd {
#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(29)
#define XHCI_SUSPEND_DELAY BIT_ULL(30)
+ #define XHCI_ZERO_64B_REGS BIT_ULL(32)
+#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
unsigned int num_active_eps;
unsigned int limit_active_eps;
-@@ -1868,6 +1869,8 @@ struct xhci_hcd {
+@@ -1869,6 +1870,8 @@ struct xhci_hcd {
/* platform-specific data -- must come last */
unsigned long priv[0] __aligned(sizeof(s64));
diff --git a/series.conf b/series.conf
index 1361fb6ddb..e7a88135b2 100644
--- a/series.conf
+++ b/series.conf
@@ -30028,6 +30028,7 @@
patches.drivers/usbip-usbip_detach-Fix-memory-udev-context-and-udev-
patches.drivers/0001-USB-typec-tcpm-no-need-to-check-return-value-of-debu.patch
patches.fixes/0001-xhci-Allow-more-than-32-quirks.patch
+ patches.drivers/xhci-add-quirk-to-zero-64bit-registers-on-renesas-pcie-controllers.patch
patches.suse/msft-hv-1679-Drivers-hv-vmbus-enable-VMBus-protocol-version-5.0.patch
patches.fixes/ARM-amba-Fix-wrong-indentation-in-driver_override_st.patch
patches.drivers/w1-mxc_w1-Enable-clock-before-calling-clk_get_rate-o