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authorMichal Suchanek <msuchanek@suse.de>2018-10-31 12:36:54 +0100
committerMichal Suchanek <msuchanek@suse.de>2018-10-31 23:28:38 +0100
commitb975e77b8eca2b68fa50f7d25afb24736243f03f (patch)
treefc356497255a9df84ab50b0b4633d6784157101e
parent1259f6a98caffcb47731645aabf2e811d4be0876 (diff)
KVM: PPC: Book3S HV: Make radix use correct tlbie sequence in
kvmppc_radix_tlbie_page (bsc#1061840).
-rw-r--r--patches.arch/KVM-PPC-Book3S-HV-Make-radix-use-correct-tlbie-seque.patch45
-rw-r--r--series.conf1
2 files changed, 46 insertions, 0 deletions
diff --git a/patches.arch/KVM-PPC-Book3S-HV-Make-radix-use-correct-tlbie-seque.patch b/patches.arch/KVM-PPC-Book3S-HV-Make-radix-use-correct-tlbie-seque.patch
new file mode 100644
index 0000000000..43b3edae27
--- /dev/null
+++ b/patches.arch/KVM-PPC-Book3S-HV-Make-radix-use-correct-tlbie-seque.patch
@@ -0,0 +1,45 @@
+From e2560b108fb1375b5fab196c1ec0d910bbe8a38b Mon Sep 17 00:00:00 2001
+From: Nicholas Piggin <npiggin@gmail.com>
+Date: Wed, 9 May 2018 12:20:14 +1000
+Subject: [PATCH] KVM: PPC: Book3S HV: Make radix use correct tlbie sequence in
+ kvmppc_radix_tlbie_page
+
+References: bsc#1061840
+Patch-mainline: v4.17-rc7
+Git-commit: e2560b108fb1375b5fab196c1ec0d910bbe8a38b
+
+The standard eieio ; tlbsync ; ptesync must follow tlbie to ensure it
+is ordered with respect to subsequent operations.
+
+Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
+Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
+Acked-by: Michal Suchanek <msuchanek@suse.de>
+---
+ arch/powerpc/kvm/book3s_64_mmu_radix.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/powerpc/kvm/book3s_64_mmu_radix.c
+index a57eafec4dc2..a6870288c0e0 100644
+--- a/arch/powerpc/kvm/book3s_64_mmu_radix.c
++++ b/arch/powerpc/kvm/book3s_64_mmu_radix.c
+@@ -162,7 +162,7 @@ static void kvmppc_radix_tlbie_page(struct kvm *kvm, unsigned long addr,
+ if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG))
+ asm volatile(PPC_TLBIE_5(%0, %1, 0, 0, 1)
+ : : "r" (addr), "r" (kvm->arch.lpid) : "memory");
+- asm volatile("ptesync": : :"memory");
++ asm volatile("eieio ; tlbsync ; ptesync": : :"memory");
+ }
+
+ static void kvmppc_radix_flush_pwc(struct kvm *kvm, unsigned long addr)
+@@ -173,7 +173,7 @@ static void kvmppc_radix_flush_pwc(struct kvm *kvm, unsigned long addr)
+ /* RIC=1 PRS=0 R=1 IS=2 */
+ asm volatile(PPC_TLBIE_5(%0, %1, 1, 0, 1)
+ : : "r" (rb), "r" (kvm->arch.lpid) : "memory");
+- asm volatile("ptesync": : :"memory");
++ asm volatile("eieio ; tlbsync ; ptesync": : :"memory");
+ }
+
+ unsigned long kvmppc_radix_update_pte(struct kvm *kvm, pte_t *ptep,
+--
+2.13.7
+
diff --git a/series.conf b/series.conf
index 9243d4c3fb..9f74d7059b 100644
--- a/series.conf
+++ b/series.conf
@@ -15764,6 +15764,7 @@
patches.fixes/0001-ipc-shm-fix-shmat-nil-address-after-round-down-when-.patch
patches.suse/kernel-sys.c-fix-potential-Spectre-v1-issue.patch
patches.arch/KVM-PPC-Book3S-HV-Snapshot-timebase-offset-on-guest-.patch
+ patches.arch/KVM-PPC-Book3S-HV-Make-radix-use-correct-tlbie-seque.patch
patches.arch/x86-kvm-fix-lapic-timer-drift-when-guest-uses-periodic-mode
patches.arch/kvm-x86-update-cpuid-properly-when-cr4-osxave-or-cr4-pke-is-changed
patches.arch/46-kvm-x86-ia32_arch_capabilities-is-always-supported.patch