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authorJiri Slaby <jslaby@suse.cz>2019-08-16 22:01:45 +0200
committerJiri Slaby <jslaby@suse.cz>2019-08-16 22:25:10 +0200
commit5d96b9c9f141acd049e29813309e1adac5fabdb3 (patch)
tree5861c67227b9ef1b627ed5a3a4006b4826b914dc
parent7652c406f0dc29f7e0c093e0fe98603c3bc256c9 (diff)
perf/x86: Apply more accurate check on hypervisor platform
-rw-r--r--patches.kernel.org/5.2.9-114-perf-x86-Apply-more-accurate-check-on-hyperviso.patch62
-rw-r--r--series.conf1
2 files changed, 63 insertions, 0 deletions
diff --git a/patches.kernel.org/5.2.9-114-perf-x86-Apply-more-accurate-check-on-hyperviso.patch b/patches.kernel.org/5.2.9-114-perf-x86-Apply-more-accurate-check-on-hyperviso.patch
new file mode 100644
index 0000000000..a758bf0ea8
--- /dev/null
+++ b/patches.kernel.org/5.2.9-114-perf-x86-Apply-more-accurate-check-on-hyperviso.patch
@@ -0,0 +1,62 @@
+From: Zhenzhong Duan <zhenzhong.duan@oracle.com>
+Date: Thu, 25 Jul 2019 10:39:26 +0800
+Subject: [PATCH] perf/x86: Apply more accurate check on hypervisor platform
+References: bnc#1012628
+Patch-mainline: 5.2.9
+Git-commit: 5ea3f6fb37b79da33ac9211df336fd2b9f47c39f
+
+[ Upstream commit 5ea3f6fb37b79da33ac9211df336fd2b9f47c39f ]
+
+check_msr is used to fix a bug report in guest where KVM doesn't support
+LBR MSR and cause #GP.
+
+The msr check is bypassed on real HW to workaround a false failure,
+see commit d0e1a507bdc7 ("perf/x86/intel: Disable check_msr for real HW")
+
+When running a guest with CONFIG_HYPERVISOR_GUEST not set or "nopv"
+enabled, current check isn't enough and #GP could trigger.
+
+Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
+Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
+Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
+Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
+Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
+Cc: Borislav Petkov <bp@alien8.de>
+Cc: Jiri Olsa <jolsa@redhat.com>
+Cc: Juergen Gross <jgross@suse.com>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Namhyung Kim <namhyung@kernel.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lkml.kernel.org/r/1564022366-18293-1-git-send-email-zhenzhong.duan@oracle.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+Signed-off-by: Jiri Slaby <jslaby@suse.cz>
+---
+ arch/x86/events/intel/core.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
+index e9042e3f3052..6179be624f35 100644
+--- a/arch/x86/events/intel/core.c
++++ b/arch/x86/events/intel/core.c
+@@ -20,7 +20,6 @@
+ #include <asm/intel-family.h>
+ #include <asm/apic.h>
+ #include <asm/cpu_device_id.h>
+-#include <asm/hypervisor.h>
+
+ #include "../perf_event.h"
+
+@@ -4057,7 +4056,7 @@ static bool check_msr(unsigned long msr, u64 mask)
+ * Disable the check for real HW, so we don't
+ * mess with potentionaly enabled registers:
+ */
+- if (hypervisor_is_type(X86_HYPER_NATIVE))
++ if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
+ return true;
+
+ /*
+--
+2.22.0
+
diff --git a/series.conf b/series.conf
index 6911e78389..e66fc69e3e 100644
--- a/series.conf
+++ b/series.conf
@@ -1134,6 +1134,7 @@
patches.kernel.org/5.2.9-111-tty-ldsem-locking-rwsem-Add-missing-ACQUIRE-to-.patch
patches.kernel.org/5.2.9-112-perf-x86-intel-Fix-SLOTS-PEBS-event-constraint.patch
patches.kernel.org/5.2.9-113-perf-x86-intel-Fix-invalid-Bit-13-for-Icelake-M.patch
+ patches.kernel.org/5.2.9-114-perf-x86-Apply-more-accurate-check-on-hyperviso.patch
########################################################
# Build fixes that apply to the vanilla kernel too.