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authorBorislav Petkov <bp@suse.de>2015-05-27 12:23:23 +0200
committerBorislav Petkov <bp@suse.de>2015-05-27 12:23:27 +0200
commit41e1045944873afa60129691aa710712db192d0f (patch)
treee47bdfbd5c0552664b025459a331ad9e64873528
parent65bd60a436a3169e420fe2cb0ac13476c77e6b42 (diff)
x86, mce: Introduce mce_gather_info() (bsc#914987).
-rw-r--r--patches.arch/03-x86-mce-introduce-mce_gather_info.patch121
-rw-r--r--series.conf1
2 files changed, 122 insertions, 0 deletions
diff --git a/patches.arch/03-x86-mce-introduce-mce_gather_info.patch b/patches.arch/03-x86-mce-introduce-mce_gather_info.patch
new file mode 100644
index 0000000000..0059240a06
--- /dev/null
+++ b/patches.arch/03-x86-mce-introduce-mce_gather_info.patch
@@ -0,0 +1,121 @@
+From: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
+Date: Wed, 8 Jun 2011 10:57:46 +0900
+Subject: x86, mce: Introduce mce_gather_info()
+Git-commit: b8325c5b110d7ff460b79588e7e9afdcc73d5c3c
+Patch-mainline: v3.1-rc1
+References: bsc#914987
+
+This patch introduces mce_gather_info() which is to be called at the
+beginning of error handling and gathers minimum error information from
+proper error registers (and saved registers).
+
+As the result of mce_get_rip() is integrated, unnecessary zeroing
+is removed. This also takes care of saving RIP which is required to
+make some decision about error severity for SRAR errors, instead of
+retrieving it later in the handler.
+
+Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
+Acked-by: Tony Luck <tony.luck@intel.com>
+Link: http://lkml.kernel.org/r/4DEED71A.1060906@jp.fujitsu.com
+Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
+Acked-by: Borislav Petkov <bp@suse.de>
+---
+ arch/x86/kernel/cpu/mcheck/mce.c | 57 ++++++++++++++++++---------------------
+ 1 file changed, 27 insertions(+), 30 deletions(-)
+
+--- a/arch/x86/kernel/cpu/mcheck/mce.c
++++ b/arch/x86/kernel/cpu/mcheck/mce.c
+@@ -386,6 +386,31 @@ static int under_injection(void)
+ }
+
+ /*
++ * Collect all global (w.r.t. this processor) status about this machine
++ * check into our "mce" struct so that we can use it later to assess
++ * the severity of the problem as we read per-bank specific details.
++ */
++static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
++{
++ mce_setup(m);
++
++ m->mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
++ if (regs) {
++ /*
++ * Get the address of the instruction at the time of
++ * the machine check error.
++ */
++ if (m->mcgstatus & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) {
++ m->ip = regs->ip;
++ m->cs = regs->cs;
++ }
++ /* Use accurate RIP reporting if available. */
++ if (rip_msr)
++ m->ip = mce_rdmsrl(rip_msr);
++ }
++}
++
++/*
+ * Simple lockless ring to communicate PFNs from the exception handler with the
+ * process context work function. This is vastly simplified because there's
+ * only a single reader and a single writer.
+@@ -456,31 +481,6 @@ static void mce_schedule_work(void)
+ }
+ }
+
+-/*
+- * Get the address of the instruction at the time of the machine check
+- * error.
+- */
+-static inline void mce_get_rip(struct mce *m, struct pt_regs *regs)
+-{
+-
+- if (regs && (m->mcgstatus & (MCG_STATUS_RIPV|MCG_STATUS_EIPV))) {
+- m->ip = regs->ip;
+- m->cs = regs->cs;
+- /*
+- * When in VM86 mode make the cs look like ring 3
+- * always. This is a lie, but it's better than passing
+- * the additional vm86 bit around everywhere.
+- */
+- if (v8086_mode(regs))
+- m->cs |= 3;
+- } else {
+- m->ip = 0;
+- m->cs = 0;
+- }
+- if (rip_msr)
+- m->ip = mce_rdmsrl(rip_msr);
+-}
+-
+ #ifdef CONFIG_X86_LOCAL_APIC
+ /*
+ * Called after interrupts have been reenabled again
+@@ -582,9 +582,8 @@ void machine_check_poll(enum mcp_flags f
+
+ percpu_inc(mce_poll_count);
+
+- mce_setup(&m);
++ mce_gather_info(&m, NULL);
+
+- m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
+ for (i = 0; i < banks; i++) {
+ if (!mce_banks[i].ctl || !test_bit(i, *b))
+ continue;
+@@ -1036,9 +1035,8 @@ void do_machine_check(struct pt_regs *re
+ if (!banks)
+ goto out;
+
+- mce_setup(&m);
++ mce_gather_info(&m, regs);
+
+- m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
+ final = &__get_cpu_var(mces_seen);
+ *final = m;
+
+@@ -1089,7 +1087,6 @@ void do_machine_check(struct pt_regs *re
+ */
+ add_taint(TAINT_MACHINE_CHECK);
+
+- mce_get_rip(&m, regs);
+ severity = mce_severity(&m, tolerant, NULL);
+
+ /*
diff --git a/series.conf b/series.conf
index e0f634e412..88214ef0e7 100644
--- a/series.conf
+++ b/series.conf
@@ -16653,6 +16653,7 @@
# bsc#914987 - SRAR error injection
patches.arch/01-x86-mce-update-mce-severity-condition-check.patch
patches.arch/02-x86-mce-fix-mce-regression-from-recent-cleanup.patch
+ patches.arch/03-x86-mce-introduce-mce_gather_info.patch
# Check the EFI variable and the space usage more stringent.
# bnc#806499 and fixing some Samsung machines