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authorMian Yousaf Kaukab <yousaf.kaukab@suse.com>2019-10-01 16:44:31 +0200
committerMian Yousaf Kaukab <yousaf.kaukab@suse.com>2019-10-01 16:44:33 +0200
commit6c3a62905fcec3d3df8e5d932e002c8520e16ad0 (patch)
treec90de1f3c1f4ff79dcd28013cf44213252bf1fb8
parent136f3e5ff7dc1bb0c4401046dbdc40349e6687a0 (diff)
PCI: mobiveil: Fix the CPU base address setup in inbound window
-rw-r--r--patches.suse/PCI-mobiveil-Fix-the-CPU-base-address-setup-in-inbou.patch75
-rw-r--r--series.conf2
2 files changed, 77 insertions, 0 deletions
diff --git a/patches.suse/PCI-mobiveil-Fix-the-CPU-base-address-setup-in-inbou.patch b/patches.suse/PCI-mobiveil-Fix-the-CPU-base-address-setup-in-inbou.patch
new file mode 100644
index 0000000000..de492f6506
--- /dev/null
+++ b/patches.suse/PCI-mobiveil-Fix-the-CPU-base-address-setup-in-inbou.patch
@@ -0,0 +1,75 @@
+From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
+Date: Sat, 13 Jul 2019 22:11:29 +0800
+Subject: PCI: mobiveil: Fix the CPU base address setup in inbound window
+
+Git-commit: df901c85cc28b538c62f6bc20b16a8bd05fcb756
+Patch-mainline: Queued
+Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
+References: fate#326572
+
+Current code erroneously sets-up the CPU base address through the
+parameter 'pci_addr', which is passed to initialize the CPU (AXI) base
+address of the inbound window where the controller maps the PCI address
+space into CPU physical address space; furthermore, it also truncates it
+by programming only the lower 32-bit value into the inbound CPU address
+register.
+
+Fix both issues by introducing a new parameter 'u64 cpu_addr' to
+initialize both lower 32-bit and upper 32-bit of the CPU physical
+base address mapping PCI inbound transactions into CPU (AXI) ones.
+
+Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
+Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
+Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
+Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
+---
+ drivers/pci/controller/pcie-mobiveil.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
+index 672e633601c7..a45a6447b01d 100644
+--- a/drivers/pci/controller/pcie-mobiveil.c
++++ b/drivers/pci/controller/pcie-mobiveil.c
+@@ -88,6 +88,7 @@
+ #define AMAP_CTRL_TYPE_MASK 3
+
+ #define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win)
++#define PAB_EXT_PEX_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0xb4a0, win)
+ #define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win)
+ #define PAB_PEX_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x4ba8, win)
+ #define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win)
+@@ -462,7 +463,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie)
+ }
+
+ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
+- u64 pci_addr, u32 type, u64 size)
++ u64 cpu_addr, u64 pci_addr, u32 type, u64 size)
+ {
+ u32 value;
+ u64 size64 = ~(size - 1);
+@@ -482,7 +483,10 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
+ csr_writel(pcie, upper_32_bits(size64),
+ PAB_EXT_PEX_AMAP_SIZEN(win_num));
+
+- csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num));
++ csr_writel(pcie, lower_32_bits(cpu_addr),
++ PAB_PEX_AMAP_AXI_WIN(win_num));
++ csr_writel(pcie, upper_32_bits(cpu_addr),
++ PAB_EXT_PEX_AMAP_AXI_WIN(win_num));
+
+ csr_writel(pcie, lower_32_bits(pci_addr),
+ PAB_PEX_AMAP_PEX_WIN_L(win_num));
+@@ -624,7 +628,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
+ CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res));
+
+ /* memory inbound translation window */
+- program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
++ program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
+
+ /* Get the I/O and memory ranges from DT */
+ resource_list_for_each_entry(win, &pcie->resources) {
+--
+2.16.4
+
diff --git a/series.conf b/series.conf
index a92325a6a3..17d6d7123a 100644
--- a/series.conf
+++ b/series.conf
@@ -454,6 +454,8 @@
########################################################
# Other drivers
########################################################
+ #NXP lx2160 PCIe controller driver v8
+ patches.suse/PCI-mobiveil-Fix-the-CPU-base-address-setup-in-inbou.patch
########################################################
# Debugging