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authorJoerg Roedel <jroedel@suse.de>2018-08-10 11:24:32 +0200
committerJoerg Roedel <jroedel@suse.de>2018-08-10 11:24:53 +0200
commit7aef11d70b4e2009fe165a23f83c4a0fc908d57f (patch)
treec08f47a38d430d89ec05c7e31b9db84e9d47ecbe
parentd92455124eaf434a52484beaab7556d07fed49de (diff)
x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when
available (fate#324429).
-rw-r--r--patches.arch/x86-cpu-amd-derive-cpu-topology-from-cpuid-function-0xb-when-available62
-rw-r--r--series.conf1
2 files changed, 63 insertions, 0 deletions
diff --git a/patches.arch/x86-cpu-amd-derive-cpu-topology-from-cpuid-function-0xb-when-available b/patches.arch/x86-cpu-amd-derive-cpu-topology-from-cpuid-function-0xb-when-available
new file mode 100644
index 0000000000..c74e30f81b
--- /dev/null
+++ b/patches.arch/x86-cpu-amd-derive-cpu-topology-from-cpuid-function-0xb-when-available
@@ -0,0 +1,62 @@
+From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+Date: Fri, 27 Apr 2018 16:48:01 -0500
+Subject: x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when
+ available
+Git-commit: 3986a0a805e668a63fac0ca2cdfa8db951f87c4b
+Patch-mainline: v4.18-rc1
+References: fate#324429
+
+Derive topology information from Extended Topology Enumeration (CPUID
+function 0xB) when the information is available.
+
+Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Link: http://lkml.kernel.org/r/1524865681-112110-3-git-send-email-suravee.suthikulpanit@amd.com
+
+Acked-by: Joerg Roedel <jroedel@suse.de>
+---
+ arch/x86/kernel/cpu/amd.c | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -326,6 +326,7 @@ static void amd_get_topology(struct cpui
+
+ /* get information required for multi-node processors */
+ if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
++ int err;
+ u32 eax, ebx, ecx, edx;
+
+ cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
+@@ -344,6 +345,14 @@ static void amd_get_topology(struct cpui
+ }
+
+ /*
++ * In case leaf B is available, use it to derive
++ * topology information.
++ */
++ err = detect_extended_topology(c);
++ if (!err)
++ c->x86_coreid_bits = get_count_order(c->x86_max_cores);
++
++ /*
+ * We may have multiple LLCs if L3 caches exist, so check if we
+ * have an L3 cache by looking at the L3 cache CPUID leaf.
+ */
+@@ -393,7 +402,6 @@ static void amd_detect_cmp(struct cpuinf
+ c->phys_proc_id = c->initial_apicid >> bits;
+ /* use socket ID also for last level cache */
+ per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
+- amd_get_topology(c);
+ #endif
+ }
+
+@@ -830,6 +838,7 @@ static void init_amd(struct cpuinfo_x86
+ /* Multi core CPU? */
+ if (c->extended_cpuid_level >= 0x80000008) {
+ amd_detect_cmp(c);
++ amd_get_topology(c);
+ srat_detect_node(c);
+ }
+
diff --git a/series.conf b/series.conf
index e49ff863f2..a4a4cd171b 100644
--- a/series.conf
+++ b/series.conf
@@ -15327,6 +15327,7 @@
patches.suse/0001-locking-qspinlock-Add-stat-tracking-for-pending-vs.-.patch
patches.suse/0001-locking-qspinlock-Remove-duplicate-clear_pending-fun.patch
patches.arch/x86-cpu-modify-detect_extended_topology-to-return-result
+ patches.arch/x86-cpu-amd-derive-cpu-topology-from-cpuid-function-0xb-when-available
patches.fixes/tools-power-turbostat-Correct-SNB_C1-C3_AUTO_UNDEMOT.patch
patches.drivers/PM-wakeup-Only-update-last-time-for-active-wakeup-so
patches.fixes/cpufreq-Fix-new-policy-initialization-during-limits-.patch