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authorJiri Kosina <jkosina@suse.cz>2018-06-18 14:17:58 +0200
committerJiri Kosina <jkosina@suse.cz>2018-06-18 15:27:26 +0200
commit6754714e4c0682d7a31338369510e61795f87a33 (patch)
tree29eb3307892906879f8e2302c7e5c364be0b594d
parent1ac89fb6c919506232041d255d5bc4011792961a (diff)
- Refresh patches.suse/nospec-fix-forced-cpucaps-ordering.patch.rpm-4.4.138-94.39
- Delete patches.suse/ibrs-avoid-lfence-when-runtime-disabled.patch. Drop the lfence-avoiding optimization; it has at least two issues: - ENABLE_IBRS clobbers %rax which it shouldn't do - there is probably a place where forcing _IBRS_OFF is missed (or is too late) and therefore ENABLE_IBRS is sometimes called early during boot while it should not. Let's drop the uoptimization for now. Fixes bsc#1098009 and bsc#1098012 suse-commit: baa07f9df91b6684c4581228137bcabdcc4dc66c
-rw-r--r--arch/x86/include/asm/cpufeature.h1
-rw-r--r--arch/x86/include/asm/spec_ctrl.h44
-rw-r--r--arch/x86/kernel/cpu/bugs.c2
-rw-r--r--arch/x86/kernel/cpu/spec_ctrl.c16
4 files changed, 43 insertions, 20 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 86c82a54a516..953b219024af 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -77,7 +77,6 @@
* word 7 und we not even attempting to do a nasty kABI breakage.
*/
#define X86_FEATURE_ZEN ( 2*32+ 4) /* "" CPU is AMD family 0x17 (Zen) */
-#define X86_FEATURE_IBRS_OFF ( 2*32+ 5) /* "" Force-disabled IBRS usage on kernel entry */
/* Other features, Linux-defined mapping, word 3 */
/* This range is used for feature bits which conflict or are synthesized */
diff --git a/arch/x86/include/asm/spec_ctrl.h b/arch/x86/include/asm/spec_ctrl.h
index a1437da9e0a6..936060d50ade 100644
--- a/arch/x86/include/asm/spec_ctrl.h
+++ b/arch/x86/include/asm/spec_ctrl.h
@@ -16,27 +16,55 @@
.endm
.macro ENABLE_IBRS_CLOBBER
- ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_IBRS_OFF
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_SPEC_CTRL
+ call x86_ibrs_enabled
+ test %eax, %eax
+ jz .Llfence_\@
__ENABLE_IBRS_CLOBBER
+ jmp .Lend_\@
+
+.Llfence_\@:
+ lfence
.Lend_\@:
.endm
.macro ENABLE_IBRS
- ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_IBRS_OFF
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_SPEC_CTRL
+
+ pushq %rax
+
+ call x86_ibrs_enabled
+ test %eax, %eax
+ jz .Llfence_\@
pushq %rcx
pushq %rdx
__ENABLE_IBRS_CLOBBER
popq %rdx
popq %rcx
+
+ jmp .Lpop_\@
+
+.Llfence_\@:
+ lfence
+
+.Lpop_\@:
+ popq %rax
+
.Lend_\@:
.endm
.macro DISABLE_IBRS
- ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_IBRS_OFF
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_SPEC_CTRL
+
+ pushq %rax
+
+ call x86_ibrs_enabled
+ test %eax, %eax
+ jz .Llfence_\@
pushq %rcx
pushq %rdx
@@ -46,6 +74,15 @@
wrmsr
popq %rdx
popq %rcx
+
+ jmp .Lpop_\@
+
+.Llfence_\@:
+ lfence
+
+.Lpop_\@:
+ popq %rax
+
.Lend_\@:
.endm
@@ -58,7 +95,6 @@ void x86_disable_ibrs(void);
unsigned int x86_ibrs_enabled(void);
unsigned int x86_ibpb_enabled(void);
void x86_spec_check(void);
-void noibrs(void);
int nospec(char *str);
static inline void x86_ibp_barrier(void)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index ea22ededefb9..60ab1d35f35a 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -423,7 +423,7 @@ retpoline_auto:
if (!is_skylake_era()) {
pr_info("Retpolines enabled, force-disabling IBRS due to !SKL-era core\n");
- noibrs();
+ ibrs_state = 0;
}
}
diff --git a/arch/x86/kernel/cpu/spec_ctrl.c b/arch/x86/kernel/cpu/spec_ctrl.c
index 78e25fe8572d..d1f497279022 100644
--- a/arch/x86/kernel/cpu/spec_ctrl.c
+++ b/arch/x86/kernel/cpu/spec_ctrl.c
@@ -59,7 +59,6 @@ void x86_spec_check(void)
if (ibrs_state == -1) {
/* noone force-disabled IBRS */
ibrs_state = 1;
- setup_clear_cpu_cap(X86_FEATURE_IBRS_OFF);
printk_once(KERN_INFO "IBRS: initialized\n");
}
printk_once(KERN_INFO "IBPB: initialized\n");
@@ -80,13 +79,7 @@ void x86_spec_check(void)
}
EXPORT_SYMBOL_GPL(x86_spec_check);
-void noibrs(void)
-{
- setup_force_cpu_cap(X86_FEATURE_IBRS_OFF);
- ibrs_state = 0;
-}
-
-static void noibpb(void)
+int nospec(char *str)
{
/*
* Due to way how apply_forced_caps() works, we have to
@@ -95,13 +88,8 @@ static void noibpb(void)
*/
setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL);
clear_bit(X86_FEATURE_SPEC_CTRL, (unsigned long *)cpu_caps_set);
+ ibrs_state = 0;
ibpb_state = 0;
-}
-
-int nospec(char *str)
-{
- noibrs();
- noibpb();
return 0;
}