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authorThomas Zimmermann <tzimmermann@suse.de>2019-01-10 15:40:00 +0100
committerThomas Zimmermann <tzimmermann@suse.de>2019-01-11 13:39:40 +0100
commit897ba657a2cb518912215e4b9bee5489ceb86add (patch)
treef3ce53d83c151b3d236399466ff878a5d0684189
parentcbb2b2e0d6c202bb71a392a07e7c4d2e754805a0 (diff)
gpu: ipu-v3: Allow channel burst locking on i.MX6 only (bsc#1113956)
-rw-r--r--drivers/gpu/ipu-v3/ipu-common.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 2b16660ab8da..10f648d9de74 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -397,6 +397,14 @@ int ipu_idmac_lock_enable(struct ipuv3_channel *channel, int num_bursts)
return -EINVAL;
}
+ /*
+ * IPUv3EX / i.MX51 has a different register layout, and on IPUv3M /
+ * i.MX53 channel arbitration locking doesn't seem to work properly.
+ * Allow enabling the lock feature on IPUv3H / i.MX6 only.
+ */
+ if (bursts && ipu->ipu_type != IPUV3H)
+ return -EINVAL;
+
for (i = 0; i < ARRAY_SIZE(idmac_lock_en_info); i++) {
if (channel->num == idmac_lock_en_info[i].chnum)
break;