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authorLinus Torvalds <torvalds@g5.osdl.org>2005-09-11 14:07:43 -0700
committerChris Wright <chrisw@osdl.org>2005-09-16 18:01:56 -0700
commitedf3b5b336f55b8a97142592bf5c1b7944deb9d1 (patch)
tree195c44d68b5efadd4deb25fb165dbe4af842552f
parent2498037d5a6668b733acc712a3106ffd4e1ef735 (diff)
[PATCH] hpt366: write the full 4 bytes of ROM address, not just low 1 byte
This is one heck of a confused driver. It uses a byte write to a dword register to enable a ROM resource that it doesn't even seem to be using. "Lost and wandering in the desert of confusion" Signed-off-by: Linus Torvalds <torvalds@osdl.org> Signed-off-by: Chris Wright <chrisw@osdl.org>
-rw-r--r--drivers/ide/pci/hpt366.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 7b64db10d1b0..127619a109ed 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1334,9 +1334,13 @@ static int __devinit init_hpt366(struct pci_dev *dev)
static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name)
{
int ret = 0;
- /* FIXME: Not portable */
+
+ /*
+ * FIXME: Not portable. Also, why do we enable the ROM in the first place?
+ * We don't seem to be using it.
+ */
if (dev->resource[PCI_ROM_RESOURCE].start)
- pci_write_config_byte(dev, PCI_ROM_ADDRESS,
+ pci_write_config_dword(dev, PCI_ROM_ADDRESS,
dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4));