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authorMaynard Johnson <maynardj@us.ibm.com>2009-05-07 05:48:32 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-05-15 16:43:41 +1000
commite5fc948b11a9d0aee1cabe7c82726bc36d496875 (patch)
treeea0b22d395eae62f41c00b7cf14ae263933433bf
parent397717c578a5e02cf76b6c99c68f50fee94b59f8 (diff)
powerpc: Fix oprofile sampling of marked events on POWER7
Description ----------- Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on older processors where those bits are defined. Background ---------- The performance monitor unit of the 64-bit POWER processor family has the ability to collect accurate instruction-level samples when profiling on marked events (i.e., "PM_MRK_<event-name>"). In processors prior to POWER6, the MMCRA register contained "slot information" that the oprofile kernel driver used to adjust the value latched in the SIAR at the time of a PMU interrupt. But as of POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use, since the SIAR itself holds the accurate sampled instruction address. With POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of these slot bits was, in effect, a NOP. But with POWER7, these bits are no longer zero'ed out; however, they serve some other purpose rather than slot information. Thus, using these bits on POWER7 to adjust the SIAR value results in samples being attributed to the wrong instructions. The attached patch changes the oprofile kernel driver to ignore these slot bits on all newer processors starting with POWER6. Signed-off-by: Maynard Johnson <maynardj@us.ibm.com> Signed-off-by: Michael Wolf <mjw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-rw-r--r--arch/powerpc/oprofile/op_model_power4.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 3e3d91f536e0..80774092db77 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -26,6 +26,7 @@
static unsigned long reset_value[OP_MAX_COUNTER];
static int oprofile_running;
+static int use_slot_nums;
/* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */
static u32 mmcr0_val;
@@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_counter_config *ctr,
else
mmcr0_val |= MMCR0_PROBLEM_DISABLE;
+ if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) ||
+ __is_processor(PV_970) || __is_processor(PV_970FX) ||
+ __is_processor(PV_970MP) || __is_processor(PV_970GX) ||
+ __is_processor(PV_POWER5) || __is_processor(PV_POWER5p))
+ use_slot_nums = 1;
+
return 0;
}
@@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_regs *regs)
mmcra = mfspr(SPRN_MMCRA);
- if (mmcra & MMCRA_SAMPLE_ENABLE) {
+ if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) {
slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT);
if (slot > 1)
pc += 4 * (slot - 1);