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authorGreg Kroah-Hartman <gregkh@suse.de>2010-05-24 14:58:13 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2010-05-26 14:29:22 -0700
commit763f2ee657b24124d7a0b561b61bdb26231b0169 (patch)
treeb61ad7ec4373e2c6be029b5b099164690e8be473
parent0ddd11675c96e939b25c36c69dd19eff58bd5967 (diff)
Revert "parisc: Set PCI CLS early in boot."
This reverts the following patch, which shouldn't have been applied to the .32 stable tree as it causes problems. commit 5fd4514bb351b5ecb0da3692fff70741e5ed200c upstream. Set the PCI CLS early in the boot process to prevent device failures. In pcibios_set_master use the new pci_cache_line_size instead of a hard-coded value. Signed-off-by: Carlos O'Donell <carlos@codesourcery.com> Reviewed-by: Grant Grundler <grundler@google.com> Signed-off-by: Kyle McMartin <kyle@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--arch/parisc/kernel/pci.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 9e74bfe071dc..f7064abc3bb6 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -18,6 +18,7 @@
#include <asm/io.h>
#include <asm/system.h>
+#include <asm/cache.h> /* for L1_CACHE_BYTES */
#include <asm/superio.h>
#define DEBUG_RESOURCES 0
@@ -122,10 +123,6 @@ static int __init pcibios_init(void)
} else {
printk(KERN_WARNING "pci_bios != NULL but init() is!\n");
}
-
- /* Set the CLS for PCI as early as possible. */
- pci_cache_line_size = pci_dfl_cache_line_size;
-
return 0;
}
@@ -174,7 +171,7 @@ void pcibios_set_master(struct pci_dev *dev)
** upper byte is PCI_LATENCY_TIMER.
*/
pci_write_config_word(dev, PCI_CACHE_LINE_SIZE,
- (0x80 << 8) | pci_cache_line_size);
+ (0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32)));
}