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authorTakashi Iwai <tiwai@suse.de>2018-07-26 20:49:00 +0200
committerTakashi Iwai <tiwai@suse.de>2018-07-26 20:49:51 +0200
commit59a63769ef15f9c9ec8b2ba8da5cf78a3d05ff34 (patch)
treed07f2c212ba74498c82b1b449484d966c2b18a82
parentec03dbb3f19c0cec71d5f646af1133ff453ee6eb (diff)
clk: mvebu: use correct bit for 98DX3236 NAND (bsc#1051510).
-rw-r--r--drivers/clk/mvebu/clk-corediv.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c
index 8491979f4096..68f05c53d40e 100644
--- a/drivers/clk/mvebu/clk-corediv.c
+++ b/drivers/clk/mvebu/clk-corediv.c
@@ -72,7 +72,7 @@ static const struct clk_corediv_desc mvebu_corediv_desc[] = {
};
static const struct clk_corediv_desc mv98dx3236_corediv_desc[] = {
- { .mask = 0x0f, .offset = 6, .fieldbit = 26 }, /* NAND clock */
+ { .mask = 0x0f, .offset = 6, .fieldbit = 27 }, /* NAND clock */
};
#define to_corediv_clk(p) container_of(p, struct clk_corediv, hw)